dts: arm: Add base DTS support for TI CC3200

This patch adds the necessary DTS, YAML, and Makefile changes necessary
to generate proper include information for the CC3200.  The initial
base support includes SRAM, FLASH, and UART devices.

Change-Id: I8ef8c24c3915198dbb5cfeb2431aa6dc68267d0e
Signed-off-by: Andy Gross <andy.gross@linaro.org>

dts/arm/Makefile

@@ -1,5 +1,6 @@
 ifeq ($(CONFIG_HAS_DTS),y)
 dtb-$(CONFIG_BOARD_FRDM_K64F)	=	frdm_k64f.dts_compiled
 dtb-$(CONFIG_BOARD_HEXIWEAR_K64)	=	hexiwear_k64.dts_compiled
+dtb-$(CONFIG_BOARD_CC3200_LAUNCHXL)	=	cc3200_launchxl.dts_compiled
 always	:= $(dtb-y)
 endif

dts/arm/cc3200_launchxl.dts

@@ -0,0 +1,22 @@
+/dts-v1/;
+
+#include "cc32xx_launchxl.dtsi"
+
+/ {
+	model = "TI CC3200 LaunchXL";
+	compatible = "ti,cc32xx";
+
+	aliases {
+		uart_0 = &uart0;
+		uart_1 = &uart1;
+	};
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+};
+
+&uart0 {
+	status = "ok";
+};

dts/arm/cc3200_launchxl.fixup

@@ -0,0 +1,7 @@
+#define CONFIG_NUM_IRQS			ARM_ARMV7M_NVIC_E000E100_NUM_IRQS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_ARMV7M_NVIC_E000E100_NUM_IRQ_PRIO_BITS
+
+#define EXCEPTION_UARTA0		TI_CC32XX_UART_4000C000_IRQ_0
+#define CONFIG_UART_CC32XX_IRQ_PRI	TI_CC32XX_UART_4000C000_ZEPHYR_IRQ_PRIO
+#define UART_CC32XX_BASE_ADDRESS	TI_CC32XX_UART_4000C000_BASE_ADDRESS
+#define CONFIG_UART_CC32XX_BAUDRATE	TI_CC32XX_UART_4000C000_BAUD_RATE

dts/arm/cc32xx_launchxl.dtsi

@@ -0,0 +1,52 @@
+#include "armv7-m.dtsi"
+#include <inc/hw_memmap.h>
+#include <inc/hw_ints.h>
+
+/* Note: Zephyr uses exception numbers, vs the IRQ #s used by the CC3200 SDK */
+/* which are offset by 16: */
+#define EXP_UARTA0 (INT_UARTA0 - 16)
+#define EXP_UARTA1 (INT_UARTA1 - 16)
+
+/ {
+	cpus {
+		cpu@0 {
+			compatible = "arm,cortex-m4";
+		};
+	};
+
+	sram0: memory {
+		compatible = "sram";
+		reg = <0x20004000 0x3C000>;
+	};
+
+	flash0: serial-flash {
+		compatible = "serial-flash";
+		reg = <0x0 0x80000>;
+	};
+
+	soc {
+		uart0: uart@UARTA0_BASE {
+			compatible = "ti,cc32xx-uart";
+			reg = <UARTA0_BASE 0x4c>;
+			interrupts = <EXP_UARTA0>;
+			zephyr,irq-prio = <3>;
+			baud-rate = <115200>;
+			status = "disabled";
+		};
+
+		uart1: uart@UARTA1_BASE {
+			compatible = "ti,cc32xx-uart";
+			reg = <UARTA1_BASE 0x4c>;
+			interrupts = <EXP_UARTA1>;
+			zephyr,irq-prio = <3>;
+			baud-rate = <115200>;
+			status = "disabled";
+		};
+
+	};
+};
+
+&nvic {
+	num-irq-prio-bits = <3>;
+	num-irqs = <179>;
+};

dts/arm/yaml/ti,cc32xx-uart.yaml

@@ -0,0 +1,31 @@
+---
+title: TI CC32XX Uart
+id: ti,cc32xx-uart
+version: 0.1
+
+description: >
+    This binding gives a base representation of the TI CC32XX UART
+
+inherits:
+  - !include uart.yaml
+  - !include zephyr_devices.yaml
+
+properties:
+  - compatible:
+      type: string
+      category: required
+      description: compatible strings
+      constraint: "ti,cc32xx-uart"
+
+  - reg:
+      type: array
+      description: mmio register space
+      generation: define
+      category: required
+
+  - interrupts:
+      type: array
+      category: required
+      description: required interrupts
+      generation: define
+...