patrick/zephyr
1
0
Fork 0
Code Issues Pull requests Actions 7 Packages Projects Releases Wiki Activity

drivers: use DT_INST_PARENT

Browse source 
Replace usages of DT_PARENT(DT_DRV_INST(idx)) with more idiomatic
DT_INST_PARENT(idx).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2021-12-15 11:58:44 +01:00 committed by David Leach
parent 0c0ad3d332
commit 3e9d8da9ec
11 changed files with 19 additions and 22 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/counter/counter_ll_stm32_timer.c
View file

@ -561,7 +561,7 @@ void counter_stm32_irq_handler(const struct device *dev)
} }
} }
#define TIMER(idx) DT_PARENT(DT_DRV_INST(idx)) #define TIMER(idx) DT_INST_PARENT(idx)
/** TIMx instance from DT */ /** TIMx instance from DT */
#define TIM(idx) ((TIM_TypeDef *)DT_REG_ADDR(TIMER(idx))) #define TIM(idx) ((TIM_TypeDef *)DT_REG_ADDR(TIMER(idx)))

2
drivers/counter/counter_mcux_snvs.c
View file

@ -322,7 +322,7 @@ static struct mcux_snvs_config mcux_snvs_config_0 = {
.channels = MCUX_SNVS_NUM_CHANNELS, .channels = MCUX_SNVS_NUM_CHANNELS,
.flags = COUNTER_CONFIG_INFO_COUNT_UP, .flags = COUNTER_CONFIG_INFO_COUNT_UP,
}, },
.base = (SNVS_Type *)DT_REG_ADDR(DT_PARENT(DT_DRV_INST(0))), .base = (SNVS_Type *)DT_REG_ADDR(DT_INST_PARENT(0)),
.irq_config_func = mcux_snvs_irq_config_0, .irq_config_func = mcux_snvs_irq_config_0,
}; };

4
drivers/flash/flash_stm32_qspi.c
View file

@ -31,7 +31,7 @@ LOG_MODULE_REGISTER(flash_stm32_qspi, CONFIG_FLASH_LOG_LEVEL);
#define STM32_QSPI_FIFO_THRESHOLD 8 #define STM32_QSPI_FIFO_THRESHOLD 8
#define STM32_QSPI_CLOCK_PRESCALER_MAX 255 #define STM32_QSPI_CLOCK_PRESCALER_MAX 255
#define STM32_QSPI_USE_DMA DT_NODE_HAS_PROP(DT_PARENT(DT_DRV_INST(0)), dmas) #define STM32_QSPI_USE_DMA DT_NODE_HAS_PROP(DT_INST_PARENT(0), dmas)
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_qspi_nor) #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_qspi_nor)
@ -857,7 +857,7 @@ static int flash_stm32_qspi_init(const struct device *dev)
static void flash_stm32_qspi_irq_config_func(const struct device *dev); static void flash_stm32_qspi_irq_config_func(const struct device *dev);
#define STM32_QSPI_NODE DT_PARENT(DT_DRV_INST(0)) #define STM32_QSPI_NODE DT_INST_PARENT(0)
PINCTRL_DT_DEFINE(STM32_QSPI_NODE) PINCTRL_DT_DEFINE(STM32_QSPI_NODE)

2
drivers/gpio/gpio_nct38xx_port.c
View file

@ -465,7 +465,7 @@ BUILD_ASSERT(CONFIG_GPIO_NCT38XX_PORT_INIT_PRIORITY > CONFIG_GPIO_NCT38XX_INIT_P
static const struct gpio_nct38xx_port_config gpio_nct38xx_port_cfg_##inst = { \ static const struct gpio_nct38xx_port_config gpio_nct38xx_port_cfg_##inst = { \
.common = { .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(inst) & \ .common = { .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(inst) & \
DT_INST_PROP(inst, pin_mask) }, \ DT_INST_PROP(inst, pin_mask) }, \
.nct38xx_dev = DEVICE_DT_GET(DT_PARENT(DT_DRV_INST(inst))), \ .nct38xx_dev = DEVICE_DT_GET(DT_INST_PARENT(inst)), \
.gpio_port = DT_INST_REG_ADDR(inst), \ .gpio_port = DT_INST_REG_ADDR(inst), \
.pinmux_mask = COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, pinmux_mask), \ .pinmux_mask = COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, pinmux_mask), \
(DT_INST_PROP(inst, pinmux_mask)), (0)), \ (DT_INST_PROP(inst, pinmux_mask)), (0)), \

2
drivers/mdio/mdio_sam.c
View file

@ -130,7 +130,7 @@ static const struct mdio_driver_api mdio_sam_driver_api = {
#define MDIO_SAM_CONFIG(n) \ #define MDIO_SAM_CONFIG(n) \
static const struct mdio_sam_dev_config mdio_sam_dev_config_##n = { \ static const struct mdio_sam_dev_config mdio_sam_dev_config_##n = { \
.regs = (Gmac *)DT_REG_ADDR(DT_PARENT(DT_DRV_INST(n))), \ .regs = (Gmac *)DT_REG_ADDR(DT_INST_PARENT(n)), \
.protocol = DT_INST_ENUM_IDX(n, protocol), \ .protocol = DT_INST_ENUM_IDX(n, protocol), \
}; };

2
drivers/memc/memc_stm32_sdram.c
View file

@ -119,7 +119,7 @@ static const struct memc_stm32_sdram_bank_config bank_config[] = {
/** SDRAM configuration. */ /** SDRAM configuration. */
static const struct memc_stm32_sdram_config config = { static const struct memc_stm32_sdram_config config = {
.sdram = (FMC_SDRAM_TypeDef *)(DT_REG_ADDR(DT_PARENT(DT_DRV_INST(0))) + .sdram = (FMC_SDRAM_TypeDef *)(DT_REG_ADDR(DT_INST_PARENT(0)) +
SDRAM_OFFSET), SDRAM_OFFSET),
.power_up_delay = DT_INST_PROP(0, power_up_delay), .power_up_delay = DT_INST_PROP(0, power_up_delay),
.num_auto_refresh = DT_INST_PROP(0, num_auto_refresh), .num_auto_refresh = DT_INST_PROP(0, num_auto_refresh),

2
drivers/ps2/ps2_npcx_channel.c
View file

@ -111,7 +111,7 @@ static const struct ps2_driver_api ps2_channel_npcx_driver_api = {
.channel_id = DT_INST_PROP(inst, channel), \ .channel_id = DT_INST_PROP(inst, channel), \
.alts_size = ARRAY_SIZE(ps2_channel_alts##inst), \ .alts_size = ARRAY_SIZE(ps2_channel_alts##inst), \
.alts_list = ps2_channel_alts##inst, \ .alts_list = ps2_channel_alts##inst, \
.ps2_ctrl = DEVICE_DT_GET(DT_PARENT(DT_DRV_INST(inst))), \ .ps2_ctrl = DEVICE_DT_GET(DT_INST_PARENT(inst)), \
}; \ }; \
\ \
DEVICE_DT_INST_DEFINE(inst, ps2_npcx_channel_init, NULL, NULL, \ DEVICE_DT_INST_DEFINE(inst, ps2_npcx_channel_init, NULL, NULL, \

3
drivers/pwm/pwm_gecko.c
View file

@ -102,8 +102,7 @@ static int pwm_gecko_init(const struct device *dev)
#define PWM_GECKO_INIT(index) \ #define PWM_GECKO_INIT(index) \
static const struct pwm_gecko_config pwm_gecko_config_##index = { \ static const struct pwm_gecko_config pwm_gecko_config_##index = { \
.timer = (TIMER_TypeDef *)DT_REG_ADDR( \ .timer = (TIMER_TypeDef *)DT_REG_ADDR(DT_INST_PARENT(index)), \
DT_PARENT(DT_DRV_INST(index))), \
.clock = CLOCK_TIMER(index), \ .clock = CLOCK_TIMER(index), \
.prescaler = DT_INST_PROP(index, prescaler), \ .prescaler = DT_INST_PROP(index, prescaler), \
.prescale_enum = (TIMER_Prescale_TypeDef) \ .prescale_enum = (TIMER_Prescale_TypeDef) \

2
drivers/pwm/pwm_mcux.c
View file

@ -169,7 +169,7 @@ static const struct pwm_driver_api pwm_mcux_driver_api = {
static struct pwm_mcux_data pwm_mcux_data_ ## n; \ static struct pwm_mcux_data pwm_mcux_data_ ## n; \
\ \
static const struct pwm_mcux_config pwm_mcux_config_ ## n = { \ static const struct pwm_mcux_config pwm_mcux_config_ ## n = { \
.base = (void *)DT_REG_ADDR(DT_PARENT(DT_DRV_INST(n))), \ .base = (void *)DT_REG_ADDR(DT_INST_PARENT(n)), \
.index = DT_INST_PROP(n, index), \ .index = DT_INST_PROP(n, index), \
.mode = kPWM_EdgeAligned, \ .mode = kPWM_EdgeAligned, \
.prescale = kPWM_Prescale_Divide_128, \ .prescale = kPWM_Prescale_Divide_128, \

16
drivers/pwm/pwm_stm32.c
View file

@ -633,10 +633,10 @@ static int pwm_stm32_init(const struct device *dev)
#define IRQ_CONFIG_FUNC(index) \ #define IRQ_CONFIG_FUNC(index) \
static void pwm_stm32_irq_config_func_##index(const struct device *dev) \ static void pwm_stm32_irq_config_func_##index(const struct device *dev) \
{ \ { \
IRQ_CONNECT(DT_IRQN(DT_PARENT(DT_DRV_INST(index))), \ IRQ_CONNECT(DT_IRQN(DT_INST_PARENT(index)), \
DT_IRQ(DT_PARENT(DT_DRV_INST(index)), priority), \ DT_IRQ(DT_INST_PARENT(index), priority), \
pwm_stm32_isr, DEVICE_DT_INST_GET(index), 0); \ pwm_stm32_isr, DEVICE_DT_INST_GET(index), 0); \
irq_enable(DT_IRQN(DT_PARENT(DT_DRV_INST(index)))); \ irq_enable(DT_IRQN(DT_INST_PARENT(index))); \
} }
#define CAPTURE_INIT(index) \ #define CAPTURE_INIT(index) \
.irq_config_func = pwm_stm32_irq_config_func_##index .irq_config_func = pwm_stm32_irq_config_func_##index
@ -647,8 +647,8 @@ static void pwm_stm32_irq_config_func_##index(const struct device *dev) \
#define DT_INST_CLK(index, inst) \ #define DT_INST_CLK(index, inst) \
{ \ { \
.bus = DT_CLOCKS_CELL(DT_PARENT(DT_DRV_INST(index)), bus), \ .bus = DT_CLOCKS_CELL(DT_INST_PARENT(index), bus), \
.enr = DT_CLOCKS_CELL(DT_PARENT(DT_DRV_INST(index)), bits) \ .enr = DT_CLOCKS_CELL(DT_INST_PARENT(index), bits) \
} }
/* Print warning if any pwm node has 'st,prescaler' property */ /* Print warning if any pwm node has 'st,prescaler' property */
@ -665,13 +665,11 @@ replaced by 'st,prescaler' property in parent node, aka timers"
PINCTRL_DT_INST_DEFINE(index) \ PINCTRL_DT_INST_DEFINE(index) \
\ \
static const struct pwm_stm32_config pwm_stm32_config_##index = { \ static const struct pwm_stm32_config pwm_stm32_config_##index = { \
.timer = (TIM_TypeDef *)DT_REG_ADDR( \ .timer = (TIM_TypeDef *)DT_REG_ADDR(DT_INST_PARENT(index)), \
DT_PARENT(DT_DRV_INST(index))), \
/* For compatibility reason, use pwm st_prescaler property */ \ /* For compatibility reason, use pwm st_prescaler property */ \
/* if exist, otherwise use parent (timers) property */ \ /* if exist, otherwise use parent (timers) property */ \
.prescaler = DT_PROP_OR(DT_DRV_INST(index), st_prescaler, \ .prescaler = DT_PROP_OR(DT_DRV_INST(index), st_prescaler, \
(DT_PROP(DT_PARENT(DT_DRV_INST(index)), \ (DT_PROP(DT_INST_PARENT(index), st_prescaler))), \
st_prescaler))), \
.pclken = DT_INST_CLK(index, timer), \ .pclken = DT_INST_CLK(index, timer), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \ .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
CAPTURE_INIT(index) \ CAPTURE_INIT(index) \

4
drivers/regulator/regulator_pmic.c
View file

@ -324,8 +324,8 @@ static const struct regulator_driver_api api = {
.ilim_reg = DT_INST_PROP_OR(id, ilim_reg, 0), \ .ilim_reg = DT_INST_PROP_OR(id, ilim_reg, 0), \
.ilim_mask = DT_INST_PROP_OR(id, ilim_mask, 0), \ .ilim_mask = DT_INST_PROP_OR(id, ilim_mask, 0), \
.enable_inverted = DT_INST_PROP(id, enable_inverted), \ .enable_inverted = DT_INST_PROP(id, enable_inverted), \
.i2c_address = DT_REG_ADDR(DT_PARENT(DT_DRV_INST(id))), \ .i2c_address = DT_REG_ADDR(DT_INST_PARENT(id)), \
.i2c_dev = DEVICE_DT_GET(DT_BUS(DT_PARENT(DT_DRV_INST(id)))), \ .i2c_dev = DEVICE_DT_GET(DT_BUS(DT_INST_PARENT(id))), \
.voltage_array = pmic_reg_##id##_vol_range, \ .voltage_array = pmic_reg_##id##_vol_range, \
.current_array = pmic_reg_##id##_cur_limits, \ .current_array = pmic_reg_##id##_cur_limits, \
}; \ }; \