drivers: counter: mcux: add support for TPM
Add TPM native Zephyr driver. It's mainly inspired from the GPT counter implementation. Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
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@ -28,6 +28,7 @@ zephyr_library_sources_ifdef(CONFIG_COUNTER_CMOS counter_cmos.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_GPT counter_mcux_gpt.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_QTMR counter_mcux_qtmr.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_SNVS counter_mcux_snvs.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_TPM counter_mcux_tpm.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_XEC counter_mchp_xec.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_LPTMR counter_mcux_lptmr.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MAXIM_DS3231 maxim_ds3231.c)
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@ -60,6 +60,8 @@ source "drivers/counter/Kconfig.mcux_qtmr"
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source "drivers/counter/Kconfig.mcux_snvs"
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source "drivers/counter/Kconfig.mcux_tpm"
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source "drivers/counter/Kconfig.xec"
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source "drivers/counter/Kconfig.mcux_lptmr"
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11
drivers/counter/Kconfig.mcux_tpm
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11
drivers/counter/Kconfig.mcux_tpm
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@ -0,0 +1,11 @@
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# MCUXpresso SDK TPM
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# Copyright 2023-2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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config COUNTER_MCUX_TPM
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bool "MCUX TPM counter driver"
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default y
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depends on DT_HAS_NXP_TPM_TIMER_ENABLED
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help
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Enable support for mcux Timer PWM Module (TPM) counter driver.
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300
drivers/counter/counter_mcux_tpm.c
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300
drivers/counter/counter_mcux_tpm.c
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@ -0,0 +1,300 @@
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/*
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* Copyright 2023-2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_tpm_timer
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#include <zephyr/drivers/counter.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/irq.h>
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#include <zephyr/logging/log.h>
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#include <fsl_tpm.h>
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LOG_MODULE_REGISTER(mcux_tpm, CONFIG_COUNTER_LOG_LEVEL);
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#define DEV_CFG(_dev) ((const struct mcux_tpm_config *)(_dev)->config)
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#define DEV_DATA(_dev) ((struct mcux_tpm_data *)(_dev)->data)
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struct mcux_tpm_config {
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struct counter_config_info info;
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DEVICE_MMIO_NAMED_ROM(tpm_mmio);
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const struct device *clock_dev;
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clock_control_subsys_t clock_subsys;
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tpm_clock_source_t tpm_clock_source;
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tpm_clock_prescale_t prescale;
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};
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struct mcux_tpm_data {
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DEVICE_MMIO_NAMED_RAM(tpm_mmio);
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counter_alarm_callback_t alarm_callback;
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counter_top_callback_t top_callback;
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uint32_t freq;
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void *alarm_user_data;
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void *top_user_data;
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};
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static TPM_Type *get_base(const struct device *dev)
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{
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return (TPM_Type *)DEVICE_MMIO_NAMED_GET(dev, tpm_mmio);
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}
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static int mcux_tpm_start(const struct device *dev)
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{
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const struct mcux_tpm_config *config = dev->config;
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TPM_Type *base = get_base(dev);
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TPM_StartTimer(base, config->tpm_clock_source);
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return 0;
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}
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static int mcux_tpm_stop(const struct device *dev)
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{
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TPM_Type *base = get_base(dev);
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TPM_StopTimer(base);
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return 0;
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}
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static int mcux_tpm_get_value(const struct device *dev, uint32_t *ticks)
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{
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TPM_Type *base = get_base(dev);
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*ticks = TPM_GetCurrentTimerCount(base);
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return 0;
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}
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static int mcux_tpm_set_alarm(const struct device *dev, uint8_t chan_id,
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const struct counter_alarm_cfg *alarm_cfg)
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{
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TPM_Type *base = get_base(dev);
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uint32_t current = TPM_GetCurrentTimerCount(base);
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uint32_t top_value = base->MOD;
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struct mcux_tpm_data *data = dev->data;
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uint32_t ticks = alarm_cfg->ticks;
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if (chan_id != kTPM_Chnl_0) {
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LOG_ERR("Invalid channel id");
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return -EINVAL;
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}
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if (ticks > (top_value))
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return -EINVAL;
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if ((alarm_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) == 0) {
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if (top_value - current >= ticks)
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ticks += current;
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else
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ticks -= top_value - current;
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}
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if (data->alarm_callback)
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return -EBUSY;
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data->alarm_callback = alarm_cfg->callback;
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data->alarm_user_data = alarm_cfg->user_data;
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TPM_SetupOutputCompare(base, kTPM_Chnl_0, kTPM_NoOutputSignal, ticks);
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TPM_EnableInterrupts(base, kTPM_Chnl0InterruptEnable);
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return 0;
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}
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static int mcux_tpm_cancel_alarm(const struct device *dev, uint8_t chan_id)
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{
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TPM_Type *base = get_base(dev);
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struct mcux_tpm_data *data = dev->data;
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if (chan_id != kTPM_Chnl_0) {
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LOG_ERR("Invalid channel id");
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return -EINVAL;
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}
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TPM_DisableInterrupts(base, kTPM_Chnl0InterruptEnable);
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data->alarm_callback = NULL;
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return 0;
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}
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void mcux_tpm_isr(const struct device *dev)
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{
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TPM_Type *base = get_base(dev);
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struct mcux_tpm_data *data = dev->data;
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uint32_t current = TPM_GetCurrentTimerCount(base);
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uint32_t status;
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status = TPM_GetStatusFlags(base) & (kTPM_Chnl0Flag | kTPM_TimeOverflowFlag);
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TPM_ClearStatusFlags(base, status);
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barrier_dsync_fence_full();
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if ((status & kTPM_Chnl0Flag) && data->alarm_callback) {
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TPM_DisableInterrupts(base,
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kTPM_Chnl0InterruptEnable);
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counter_alarm_callback_t alarm_cb = data->alarm_callback;
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data->alarm_callback = NULL;
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alarm_cb(dev, 0, current, data->alarm_user_data);
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}
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if ((status & kTPM_TimeOverflowFlag) && data->top_callback) {
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data->top_callback(dev, data->top_user_data);
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}
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}
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static uint32_t mcux_tpm_get_pending_int(const struct device *dev)
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{
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TPM_Type *base = get_base(dev);
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return (TPM_GetStatusFlags(base) & kTPM_Chnl0Flag);
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}
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static int mcux_tpm_set_top_value(const struct device *dev,
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const struct counter_top_cfg *cfg)
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{
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const struct mcux_tpm_config *config = dev->config;
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TPM_Type *base = get_base(dev);
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struct mcux_tpm_data *data = dev->data;
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if (data->alarm_callback)
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return -EBUSY;
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/* Check if timer already enabled. */
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#if defined(FSL_FEATURE_TPM_HAS_SC_CLKS) && FSL_FEATURE_TPM_HAS_SC_CLKS
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if (base->SC & TPM_SC_CLKS_MASK) {
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#else
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if (base->SC & TPM_SC_CMOD_MASK) {
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#endif
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/* Timer already enabled, check flags before resetting */
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if (cfg->flags & COUNTER_TOP_CFG_DONT_RESET)
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return -ENOTSUP;
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TPM_StopTimer(base);
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base->CNT = 0;
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TPM_SetTimerPeriod(base, cfg->ticks);
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TPM_StartTimer(base, config->tpm_clock_source);
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} else {
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base->CNT = 0;
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TPM_SetTimerPeriod(base, cfg->ticks);
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}
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data->top_callback = cfg->callback;
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data->top_user_data = cfg->user_data;
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TPM_EnableInterrupts(base, kTPM_TimeOverflowInterruptEnable);
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return 0;
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}
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static uint32_t mcux_tpm_get_top_value(const struct device *dev)
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{
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TPM_Type *base = get_base(dev);
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return base->MOD;
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}
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static uint32_t mcux_tpm_get_freq(const struct device *dev)
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{
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struct mcux_tpm_data *data = dev->data;
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return data->freq;
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}
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static int mcux_tpm_init(const struct device *dev)
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{
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const struct mcux_tpm_config *config = dev->config;
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struct mcux_tpm_data *data = dev->data;
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tpm_config_t tpmConfig;
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uint32_t input_clock_freq;
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TPM_Type *base;
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DEVICE_MMIO_NAMED_MAP(dev, tpm_mmio, K_MEM_CACHE_NONE | K_MEM_DIRECT_MAP);
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if (!device_is_ready(config->clock_dev)) {
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LOG_ERR("clock control device not ready");
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return -ENODEV;
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}
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if (clock_control_on(config->clock_dev, config->clock_subsys)) {
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LOG_ERR("Could not turn on clock");
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return -EINVAL;
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}
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if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
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&input_clock_freq)) {
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LOG_ERR("Could not get clock frequency");
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return -EINVAL;
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}
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data->freq = input_clock_freq / (1U << config->prescale);
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TPM_GetDefaultConfig(&tpmConfig);
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tpmConfig.prescale = config->prescale;
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base = get_base(dev);
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TPM_Init(base, &tpmConfig);
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/* Set the modulo to max value. */
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base->MOD = TPM_MAX_COUNTER_VALUE(base);
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return 0;
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}
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static const struct counter_driver_api mcux_tpm_driver_api = {
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.start = mcux_tpm_start,
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.stop = mcux_tpm_stop,
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.get_value = mcux_tpm_get_value,
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.set_alarm = mcux_tpm_set_alarm,
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.cancel_alarm = mcux_tpm_cancel_alarm,
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.set_top_value = mcux_tpm_set_top_value,
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.get_pending_int = mcux_tpm_get_pending_int,
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.get_top_value = mcux_tpm_get_top_value,
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.get_freq = mcux_tpm_get_freq,
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};
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#define TO_TPM_PRESCALE_DIVIDE(val) _DO_CONCAT(kTPM_Prescale_Divide_, val)
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#define TPM_DEVICE_INIT_MCUX(n) \
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static struct mcux_tpm_data mcux_tpm_data_ ## n; \
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\
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static const struct mcux_tpm_config mcux_tpm_config_ ## n = { \
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DEVICE_MMIO_NAMED_ROM_INIT(tpm_mmio, DT_DRV_INST(n)), \
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.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
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.clock_subsys = \
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(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name), \
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.tpm_clock_source = kTPM_SystemClock, \
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.prescale = TO_TPM_PRESCALE_DIVIDE(DT_INST_PROP(n, prescaler)), \
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.info = { \
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.max_top_value = TPM_MAX_COUNTER_VALUE(TPM(n)), \
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.freq = 0, \
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.channels = 1, \
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.flags = COUNTER_CONFIG_INFO_COUNT_UP, \
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}, \
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}; \
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\
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static int mcux_tpm_## n ##_init(const struct device *dev); \
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DEVICE_DT_INST_DEFINE(n, \
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mcux_tpm_## n ##_init, \
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NULL, \
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&mcux_tpm_data_ ## n, \
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&mcux_tpm_config_ ## n, \
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POST_KERNEL, \
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CONFIG_COUNTER_INIT_PRIORITY, \
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&mcux_tpm_driver_api); \
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\
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static int mcux_tpm_## n ##_init(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), \
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DT_INST_IRQ(n, priority), \
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mcux_tpm_isr, DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQN(n)); \
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return mcux_tpm_init(dev); \
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} \
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DT_INST_FOREACH_STATUS_OKAY(TPM_DEVICE_INIT_MCUX)
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32
dts/bindings/timer/nxp,tpm-timer.yaml
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32
dts/bindings/timer/nxp,tpm-timer.yaml
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# Copyright 2023-2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: NXP Timer/PWM Module (TPM) used as timer
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compatible: "nxp,tpm-timer"
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include: base.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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clocks:
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required: true
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prescaler:
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type: int
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required: true
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enum:
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- 1
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- 2
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- 4
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- 8
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- 16
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- 32
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- 64
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- 128
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description: Input clock prescaler
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