From 447f12d942c39439d1f0446a2d6c50328185562e Mon Sep 17 00:00:00 2001 From: Declan Snyder Date: Wed, 15 Nov 2023 11:52:12 -0600 Subject: [PATCH] drivers: nxp_flexram: Fix GPR 17 calculation GPR17 calculation for configuration of RAM banks is incorrect, bit shift should be 2 per idx, not 1, this is major bug that needs correcting, currently all RT boards are affected with wrong configuration. Signed-off-by: Declan Snyder --- drivers/memc/memc_nxp_flexram.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/memc/memc_nxp_flexram.h b/drivers/memc/memc_nxp_flexram.h index 34f606e6b8..397b60bf55 100644 --- a/drivers/memc/memc_nxp_flexram.h +++ b/drivers/memc/memc_nxp_flexram.h @@ -44,7 +44,7 @@ void memc_flexram_register_callback(flexram_callback_t callback, void *user_data * call from platform_init to set up flexram if using runtime map * must be inlined because cannot use stack */ -#define GPR17_REG_FILL(node_id, prop, idx) + (DT_PROP_BY_IDX(node_id, prop, idx) << idx) +#define GPR17_REG_FILL(node_id, prop, idx) + (DT_PROP_BY_IDX(node_id, prop, idx) << (2*idx)) static inline void memc_flexram_dt_partition(void) { /* iomuxc_gpr must be const (in ROM region) because used in reconfiguring ram */