drivers: gpio: dw: Remove dead clock gate code
Remove dead clock gate code and associated PM code as the platforms that used the clock gate code are no longer supported in Zephyr. Signed-off-by: Kumar Gala <galak@kernel.org>
This commit is contained in:
Kumar Gala
Carles Cufí
parent
ef78470e4a
commit
4773bb45b0
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@ -10,49 +10,24 @@ menuconfig GPIO_DW
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if GPIO_DW
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config GPIO_DW_CLOCK_GATE
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bool "Clock gating"
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depends on CLOCK_CONTROL
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config GPIO_DW_CLOCK_GATE_DRV_NAME
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string
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depends on GPIO_DW_CLOCK_GATE
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default ""
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config GPIO_DW_0
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bool "Designware GPIO block 0"
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help
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Include Designware GPIO driver
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config GPIO_DW_0_CLOCK_GATE_SUBSYS
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int "Clock controller's subsystem"
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depends on GPIO_DW_CLOCK_GATE && GPIO_DW_0
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config GPIO_DW_1
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bool "Designware GPIO block 1"
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help
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Include Designware GPIO driver
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config GPIO_DW_1_CLOCK_GATE_SUBSYS
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int "Clock controller's subsystem"
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depends on GPIO_DW_CLOCK_GATE && GPIO_DW_1
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config GPIO_DW_2
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bool "Designware GPIO block 1"
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help
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Include Designware GPIO driver
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config GPIO_DW_2_CLOCK_GATE_SUBSYS
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int "Clock controller's subsystem"
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depends on GPIO_DW_CLOCK_GATE && GPIO_DW_2
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config GPIO_DW_3
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bool "Designware GPIO block 1"
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help
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Include Designware GPIO driver
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config GPIO_DW_3_CLOCK_GATE_SUBSYS
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int "Clock controller's subsystem"
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depends on GPIO_DW_CLOCK_GATE && GPIO_DW_3
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endif # GPIO_DW
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@ -26,10 +26,6 @@
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#include <zephyr/drivers/interrupt_controller/ioapic.h>
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#endif
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#ifdef CONFIG_PM_DEVICE
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#include <zephyr/pm/device.h>
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#endif
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static int gpio_dw_port_set_bits_raw(const struct device *port, uint32_t mask);
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static int gpio_dw_port_clear_bits_raw(const struct device *port,
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uint32_t mask);
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@ -82,41 +78,6 @@ static void dw_set_bit(uint32_t base_addr, uint32_t offset,
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}
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#endif
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#ifdef CONFIG_GPIO_DW_CLOCK_GATE
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static inline void gpio_dw_clock_config(const struct device *port)
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{
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char *drv = CONFIG_GPIO_DW_CLOCK_GATE_DRV_NAME;
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const struct device *clk;
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clk = device_get_binding(drv);
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if (clk) {
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struct gpio_dw_runtime *context = port->data;
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context->clock = clk;
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}
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}
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static inline void gpio_dw_clock_on(const struct device *port)
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{
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const struct gpio_dw_config *config = port->config;
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struct gpio_dw_runtime *context = port->data;
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clock_control_on(context->clock, config->clock_data);
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}
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static inline void gpio_dw_clock_off(const struct device *port)
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{
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const struct gpio_dw_config *config = port->config;
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struct gpio_dw_runtime *context = port->data;
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clock_control_off(context->clock, config->clock_data);
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}
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#else
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#define gpio_dw_clock_config(...)
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#define gpio_dw_clock_on(...)
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#define gpio_dw_clock_off(...)
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#endif
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static inline int dw_base_to_block_base(uint32_t base_addr)
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{
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return (base_addr & 0xFFFFFFC0);
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@ -422,29 +383,6 @@ static inline int gpio_dw_manage_callback(const struct device *port,
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return gpio_manage_callback(&context->callbacks, callback, set);
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}
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#ifdef CONFIG_PM_DEVICE
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/*
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* Implements the driver control management functionality
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* the *context may include IN data or/and OUT data
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*/
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static int gpio_dw_device_pm_action(const struct device *dev,
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enum pm_device_action action)
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{
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switch (action) {
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case PM_DEVICE_ACTION_SUSPEND:
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gpio_dw_clock_off(dev);
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break;
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case PM_DEVICE_ACTION_RESUME:
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gpio_dw_clock_on(dev);
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break;
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default:
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return -ENOTSUP;
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}
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return 0;
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}
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#endif
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#define gpio_dw_unmask_int(...)
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static void gpio_dw_isr(const struct device *port)
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@ -484,8 +422,6 @@ static int gpio_dw_initialize(const struct device *port)
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/* interrupts in sync with system clock */
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dw_set_bit(base_addr, INT_CLOCK_SYNC, LS_SYNC_POS, 1);
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gpio_dw_clock_config(port);
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/* mask and disable interrupts */
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dw_write(base_addr, INTMASK, ~(0));
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dw_write(base_addr, INTEN, 0);
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@ -508,19 +444,14 @@ static const struct gpio_dw_config gpio_config_0 = {
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.irq_num = DT_INST_IRQN(0),
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.ngpios = DT_INST_PROP(0, ngpios),
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.config_func = gpio_config_0_irq,
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#ifdef CONFIG_GPIO_DW_CLOCK_GATE
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.clock_data = UINT_TO_POINTER(CONFIG_GPIO_DW_0_CLOCK_GATE_SUBSYS),
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#endif
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};
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static struct gpio_dw_runtime gpio_0_runtime = {
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.base_addr = DT_INST_REG_ADDR(0),
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};
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PM_DEVICE_DT_INST_DEFINE(0, gpio_dw_device_pm_action);
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DEVICE_DT_INST_DEFINE(0,
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gpio_dw_initialize, PM_DEVICE_DT_INST_GET(0), &gpio_0_runtime,
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gpio_dw_initialize, NULL, &gpio_0_runtime,
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&gpio_config_0, PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY,
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&api_funcs);
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@ -556,20 +487,14 @@ static const struct gpio_dw_config gpio_dw_config_1 = {
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.irq_num = DT_INST_IRQN(1),
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.ngpios = DT_INST_PROP(1, ngpios),
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.config_func = gpio_config_1_irq,
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#ifdef CONFIG_GPIO_DW_CLOCK_GATE
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.clock_data = UINT_TO_POINTER(CONFIG_GPIO_DW_1_CLOCK_GATE_SUBSYS),
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#endif
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};
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static struct gpio_dw_runtime gpio_1_runtime = {
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.base_addr = DT_INST_REG_ADDR(1),
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};
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PM_DEVICE_DT_INST_DEFINE(1, gpio_dw_device_pm_action);
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DEVICE_DT_INST_DEFINE(1,
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gpio_dw_initialize, PM_DEVICE_DT_INST_GET(1), &gpio_1_runtime,
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gpio_dw_initialize, NULL, &gpio_1_runtime,
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&gpio_dw_config_1, PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY,
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&api_funcs);
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@ -604,20 +529,14 @@ static const struct gpio_dw_config gpio_dw_config_2 = {
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.irq_num = DT_INST_IRQN(2),
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.ngpios = DT_INST_PROP(2, ngpios),
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.config_func = gpio_config_2_irq,
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#ifdef CONFIG_GPIO_DW_CLOCK_GATE
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.clock_data = UINT_TO_POINTER(CONFIG_GPIO_DW_2_CLOCK_GATE_SUBSYS),
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#endif
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};
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static struct gpio_dw_runtime gpio_2_runtime = {
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.base_addr = DT_INST_REG_ADDR(2),
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};
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PM_DEVICE_DT_INST_DEFINE(2, gpio_dw_device_pm_action);
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DEVICE_DT_INST_DEFINE(2,
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gpio_dw_initialize, PM_DEVICE_DT_INST_GET(2), &gpio_2_runtime,
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gpio_dw_initialize, NULL, &gpio_2_runtime,
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&gpio_dw_config_2, PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY,
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&api_funcs);
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@ -652,20 +571,14 @@ static const struct gpio_dw_config gpio_dw_config_3 = {
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.irq_num = DT_INST_IRQN(3),
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.ngpios = DT_INST_PROP(3, ngpios),
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.config_func = gpio_config_3_irq,
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#ifdef CONFIG_GPIO_DW_CLOCK_GATE
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.clock_data = UINT_TO_POINTER(CONFIG_GPIO_DW_3_CLOCK_GATE_SUBSYS),
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#endif
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};
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static struct gpio_dw_runtime gpio_3_runtime = {
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.base_addr = DT_INST_REG_ADDR(3),
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};
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PM_DEVICE_DT_INST_DEFINE(3, gpio_dw_device_pm_action);
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DEVICE_DT_INST_DEFINE(3,
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gpio_dw_initialize, PM_DEVICE_DT_INST_GET(3), &gpio_3_runtime,
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gpio_dw_initialize, NULL, &gpio_3_runtime,
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&gpio_dw_config_3, PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY,
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&api_funcs);
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@ -23,19 +23,12 @@ struct gpio_dw_config {
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uint32_t ngpios;
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uint32_t irq_num; /* set to 0 if GPIO port cannot interrupt */
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gpio_config_irq_t config_func;
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#ifdef CONFIG_GPIO_DW_CLOCK_GATE
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void *clock_data;
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#endif
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};
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struct gpio_dw_runtime {
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/* gpio_driver_data needs to be first */
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struct gpio_driver_data common;
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uint32_t base_addr;
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#ifdef CONFIG_GPIO_DW_CLOCK_GATE
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const struct device *clock;
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#endif
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sys_slist_t callbacks;
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};
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