soc: arm: add support for nuvoton numicro m48x series

Add initial support for nuvoton numicro m48x SoC series, basic
init and uart functionality are covered with gpio and clock
directly relies on HAL.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>

CODEOWNERS

@@ -38,6 +38,7 @@
 /soc/arm/infineon_xmc/                    @parthitce
 /soc/arm/nxp*/                            @MaureenHelm
 /soc/arm/nordic_nrf/                      @ioannisg
+/soc/arm/nuvoton/                         @ssekar15
 /soc/arm/qemu_cortex_a53/                 @carlocaione
 /soc/arm/st_stm32/                        @erwango
 /soc/arm/st_stm32/stm32f4/                @idlethread
@@ -260,6 +261,7 @@
 /dts/arm/ti/cc26?2*                       @bwitherspoon
 /dts/arm/ti/cc3235*                       @vanti
 /dts/arm/nordic/                          @ioannisg @carlescufi
+/dts/arm/nuvoton/                         @ssekar15
 /dts/arm/nxp/                             @MaureenHelm
 /dts/arm/microchip/                       @franciscomunoz @albertofloyd @scottwcpg
 /dts/arm/silabs/efm32gg11b*               @oanerer

dts/arm/nuvoton/m48x.dtsi

@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2020 Linumiz
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arm/armv7-m.dtsi>
+#include <mem.h>
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-m4f";
+			reg = <0>;
+		};
+	};
+
+	sram0: memory@20000000 {
+		compatible = "mmio-sram";
+	};
+
+	flash0: flash@0 {
+		compatible = "serial-flash";
+		label = "FLASH_NUVOTON";
+		erase-block-size = <4096>;
+		write-block-size = <1>;
+	};
+
+	sysclk: system-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <192000000>;
+		#clock-cells = <0>;
+	};
+
+	soc {
+		uart0: serial@40070000 {
+			compatible = "nuvoton,numicro-uart";
+			reg = <0x40070000 0x1000>;
+			status = "disabled";
+			label = "UART_0";
+		};
+
+		uart1: serial@40071000 {
+			compatible = "nuvoton,numicro-uart";
+			reg = <0x40071000 0x1000>;
+			status = "disabled";
+			label = "UART_1";
+		};
+
+		uart2: serial@40072000 {
+			compatible = "nuvoton,numicro-uart";
+			reg = <0x40072000 0x1000>;
+			status = "disabled";
+			label = "UART_2";
+		};
+
+		uart3: serial@40073000 {
+			compatible = "nuvoton,numicro-uart";
+			reg = <0x40073000 0x1000>;
+			status = "disabled";
+			label = "UART_3";
+		};
+
+		uart4: serial@40074000 {
+			compatible = "nuvoton,numicro-uart";
+			reg = <0x40074000 0x1000>;
+			status = "disabled";
+			label = "UART_4";
+		};
+
+		uart5: serial@40075000 {
+			compatible = "nuvoton,numicro-uart";
+			reg = <0x40075000 0x1000>;
+			status = "disabled";
+			label = "UART_5";
+		};
+
+		uart6: serial@40076000 {
+			compatible = "nuvoton,numicro-uart";
+			reg = <0x40076000 0x1000>;
+			status = "disabled";
+			label = "UART_6";
+		};
+
+		uart7: serial@40077000 {
+			compatible = "nuvoton,numicro-uart";
+			reg = <0x40077000 0x1000>;
+			status = "disabled";
+			label = "UART_7";
+		};
+
+	};
+};
+
+&nvic {
+	arm,num-irq-priority-bits = <4>;
+};

modules/Kconfig

@@ -17,6 +17,7 @@ source "modules/Kconfig.mbedtls"
 source "modules/Kconfig.mcux"
 source "modules/Kconfig.microchip"
 source "modules/Kconfig.nordic"
+source "modules/Kconfig.nuvoton"
 source "modules/Kconfig.open-amp"
 source "modules/Kconfig.silabs"
 source "modules/Kconfig.simplelink"

modules/Kconfig.nuvoton

@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2020 Linumiz
+# Author: Saravanan Sekar <saravanan@linumiz.com>
+
+config HAS_NUMICRO_HAL
+	bool
+	select HAS_CMSIS_CORE
+	depends on SOC_FAMILY_NUMICRO
+
+menu "Nuvoton drivers"
+	depends on HAS_NUMICRO_HAL
+
+config HAS_NUMICRO_UART
+	bool
+	help
+	  Enable Nuvoton Universal asynchronous receiver transmitter HAL
+	  module driver
+
+endmenu

soc/arm/nuvoton/CMakeLists.txt

@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2020 Linumiz
+# Author: Saravanan Sekar <saravanan@linumiz.com>
+
+add_subdirectory(${SOC_SERIES})

soc/arm/nuvoton/Kconfig

@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2020 Linumiz
+# Author: Saravanan Sekar <saravanan@linumiz.com>
+
+config SOC_FAMILY_NUMICRO
+	select PLATFORM_SPECIFIC_INIT
+	bool
+
+if SOC_FAMILY_NUMICRO
+config SOC_FAMILY
+	string
+	default "nuvoton"
+
+source "soc/arm/nuvoton/*/Kconfig.soc"
+
+endif # SOC_FAMILY_NUMICRO

soc/arm/nuvoton/Kconfig.defconfig

@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2020 Linumiz
+# Author: Saravanan Sekar <saravanan@linumiz.com>
+
+source "soc/arm/nuvoton/*/Kconfig.defconfig.series"

soc/arm/nuvoton/Kconfig.soc

@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2020 Linumiz
+# Author: Saravanan Sekar <saravanan@linumiz.com>
+
+source "soc/arm/nuvoton/*/Kconfig.series"

soc/arm/nuvoton/m48x/CMakeLists.txt

@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2020 Linumiz
+# Author: Saravanan Sekar <saravanan@linumiz.com>
+
+zephyr_sources(soc.c)

soc/arm/nuvoton/m48x/Kconfig.defconfig.m487

@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2020 Linumiz
+# Author: Saravanan Sekar <saravanan@linumiz.com>
+
+if SOC_M487
+
+config NUM_IRQS
+	default 108
+
+endif # SOC_M487

soc/arm/nuvoton/m48x/Kconfig.defconfig.series

@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2020 Linumiz
+# Author: Saravanan Sekar <saravanan@linumiz.com>
+
+if SOC_SERIES_M48X
+
+source "soc/arm/nuvoton/m48x/Kconfig.defconfig.m48*"
+
+config SOC_SERIES
+	default "m48x"
+
+endif # SOC_SERIES_M48X

soc/arm/nuvoton/m48x/Kconfig.series

@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2020 Linumiz
+# Author: Saravanan Sekar <saravanan@linumiz.com>
+
+config SOC_SERIES_M48X
+	bool "Nuvoton M48X Series MCU"
+	select ARM
+	select CPU_CORTEX_M4
+	select CPU_CORTEX_M_HAS_DWT
+	select CPU_HAS_FPU
+	select CPU_HAS_ARM_MPU
+	select CORTEX_M_SYSTICK
+	select SOC_FAMILY_NUMICRO
+	help
+	  Enable support for NUVOTON M48X MCU series

soc/arm/nuvoton/m48x/Kconfig.soc

@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2020 Linumiz
+# Author: Saravanan Sekar <saravanan@linumiz.com>
+
+choice
+	prompt "NUVOTON M48X MCU Selection"
+	depends on SOC_SERIES_M48X
+
+config SOC_M487
+	bool "M487"
+	select HAS_NUMICRO_HAL
+
+endchoice

soc/arm/nuvoton/m48x/linker.ld

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright (c) 2020 Linumiz
+ */
+
+#include <arch/arm/aarch32/cortex_m/scripts/linker.ld>

soc/arm/nuvoton/m48x/soc.c

@@ -0,0 +1,33 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright (c) 2020 Linumiz
+ * Author: Saravanan Sekar <saravanan@linumiz.com>
+ */
+
+#include <init.h>
+#include <kernel.h>
+
+void z_platform_init(void)
+{
+	SYS_UnlockReg();
+
+	/* system clock init */
+	SystemInit();
+
+	/* Enable HXT clock (external XTAL 12MHz) */
+	CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
+
+	/* Wait for HXT clock ready */
+	CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
+
+	/* Set core clock as PLL_FOUT source */
+	CLK_SetCoreClock(FREQ_192MHZ);
+
+	/* Set both PCLK0 and PCLK1 as HCLK/2 */
+	CLK->PCLKDIV = (CLK_PCLKDIV_APB0DIV_DIV2 | CLK_PCLKDIV_APB1DIV_DIV2);
+
+	SystemCoreClockUpdate();
+
+	SYS_LockReg();
+}

soc/arm/nuvoton/m48x/soc.h

@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2020 Linumiz
+ * Author: Saravanan Sekar <saravanan@linumiz.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_SOC_ARM_NUVOTON_M48X_SOC_H_
+#define ZEPHYR_SOC_ARM_NUVOTON_M48X_SOC_H_
+
+#include <sys/util.h>
+#include <devicetree.h>
+#include <NuMicro.h>
+
+#endif /* ZEPHYR_SOC_ARM_NUVOTON_M48X_SOC_H_*/

west.yml

@@ -61,6 +61,9 @@ manifest:
     - name: hal_openisa
       revision: 40d049f69c50b58ea20473bee14cf93f518bf262
       path: modules/hal/openisa
+    - name: hal_nuvoton
+      revision: b4d31f33238713a568e23618845702fadd67386f
+      path: modules/hal/nuvoton
     - name: hal_microchip
       revision: aad89bf0531a30dcd6c87e4065f1b973fb31c11f
       path: modules/hal/microchip