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drivers: flash: stm32: wait for CFGBSY & BSY2 in wait_flash_idle

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Some series (namely g0, u5, wb, wl, ?) use CFGBSY to indicate
that FLASH_CR is not ready to be modfied.

This commit adds this flag additionally to other the flash busy flags,
in flash_stm32_wait_flash_idle such that the driver waits before
trying to modify PG, PNB[6:0], PER, and MER bits in FLASH_CR.

Additionally, dual bank variants of STM32G0 have a seperarate BSY2 flag
for flash bank two.
Until now this was not yet checked in flash_stm32_wait_flash_idle.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit is contained in:
Thomas Stranger 2021-08-05 18:06:08 +02:00 committed by Christopher Friedt
parent f15f9dfd72
commit 4c862c14c1
2 changed files with 15 additions and 0 deletions
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5
drivers/flash/flash_stm32.c
View file

@ -103,6 +103,11 @@ int flash_stm32_wait_flash_idle(const struct device *dev)
busy_flags = FLASH_STM32_SR_BUSY;
/* Some Series can't modify FLASH_CR reg while CFGBSY is set. Wait as well */
#if defined(FLASH_STM32_SR_CFGBSY)
busy_flags |= FLASH_STM32_SR_CFGBSY;
#endif
while ((FLASH_STM32_REGS(dev)->FLASH_STM32_SR & busy_flags)) {
if (k_uptime_get() > timeout_time) {
LOG_ERR("Timeout! val: %d", STM32_FLASH_TIMEOUT);

10
drivers/flash/flash_stm32.h
View file

@ -54,11 +54,21 @@ struct flash_stm32_priv {
/* Redefintions of flags and masks to harmonize stm32 series: */
#if defined(CONFIG_SOC_SERIES_STM32G0X)
#if defined(FLASH_FLAG_BSY2)
#define FLASH_STM32_SR_BUSY (FLASH_FLAG_BSY1 | FLASH_FLAG_BSY2);
#else
#define FLASH_STM32_SR_BUSY (FLASH_SR_BSY1)
#endif /* defined(FLASH_FLAG_BSY2) */
#else
#define FLASH_STM32_SR_BUSY (FLASH_FLAG_BSY)
#endif
#if defined(CONFIG_SOC_SERIES_STM32G0X)
#define FLASH_STM32_SR_CFGBSY (FLASH_SR_CFGBSY)
#elif defined(FLASH_FLAG_CFGBSY)
#define FLASH_STM32_SR_CFGBSY (FLASH_FLAG_CFGBSY)
#endif
#if defined(CONFIG_SOC_SERIES_STM32G0X)
/* STM32G0 HAL FLASH_FLAG_x don't represent bit-masks, need FLASH_SR_x instead */
#define FLASH_STM32_SR_OPERR FLASH_SR_OPERR