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tests: boards: espressif: add esp32s3 to cache coex test

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Test esp32s3 for cache coexistence. Update test documentation.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This commit is contained in:
Lucas Tamborrino 2023-05-31 14:36:12 -03:00 committed by Carles Cufí
parent c435dea191
commit 4f1fd56b36
2 changed files with 33 additions and 18 deletions
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46
tests/boards/espressif_esp32/cache_coex/README.rst
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@ -12,32 +12,44 @@ with a random generated pattern. At the same time, a whole SPI Flash page is upd
value. By the end of the thread iterations, both PSRAM and SPI Flash have its contents compared against value. By the end of the thread iterations, both PSRAM and SPI Flash have its contents compared against
expected values to check for integrity. expected values to check for integrity.
Supported Boards
****************
- esp32_devkitc_wrover
- esp32s2_saola
- esp32s3_devkitm
Building and Running Building and Running
******************** ********************
Make sure you have the ESP32 DevKitC connected over USB port. Make sure you have the target connected over USB port.
.. code-block:: console .. code-block:: console
west build -b esp32_devkitc_wrover tests/boards/espressif_esp32/cache_coex west build -b <board> tests/boards/espressif_esp32/cache_coex
west flash --esp-device /dev/ttyUSB0 west flash && west espressif monitor
Sample Output Sample Output
============= =============
To check output of this test, any serial console program can be used (i.e. on Linux picocom, putty, screen, etc).
This test uses ``minicom`` on the serial port ``/dev/ttyUS0``. The following lines indicate a successful test:
.. code-block:: console .. code-block:: console
Running test suite cache_coex_test Running TESTSUITE cache_coex
=================================================================== ===================================================================
START - flash_integrity_test START - test_flash_integrity
PASS - flash_integrity_test in 0.1 seconds PASS - test_flash_integrity in 0.001 seconds
=================================================================== ===================================================================
START - ram_integrity_test START - test_ram_integrity
PASS - ram_integrity_test in 0.1 seconds PASS - test_ram_integrity in 0.001 seconds
=================================================================== ===================================================================
Test suite cache_coex_test succeeded START - test_using_spiram
=================================================================== PASS - test_using_spiram in 0.001 seconds
PROJECT EXECUTION SUCCESSFUL ===================================================================
TESTSUITE cache_coex succeeded
------ TESTSUITE SUMMARY START ------
SUITE PASS - 100.00% [cache_coex]: pass = 3, fail = 0, skip = 0, total = 3 duration = 0.003 seconds
- PASS - [cache_coex.test_flash_integrity] duration = 0.001 seconds
- PASS - [cache_coex.test_ram_integrity] duration = 0.001 seconds
- PASS - [cache_coex.test_using_spiram] duration = 0.001 seconds
------ TESTSUITE SUMMARY END ------
===================================================================
PROJECT EXECUTION SUCCESSFUL

5
tests/boards/espressif_esp32/cache_coex/testcase.yaml
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@ -1,6 +1,9 @@
tests: tests:
boards.esp32.cache_coex: boards.esp32.cache_coex:
platform_allow: esp32_devkitc_wrover esp32s2_saola platform_allow:
- esp32_devkitc_wrover
- esp32s2_saola
- esp32s3_devkitm
tags: tags:
- spiram - spiram
- spiflash - spiflash