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drivers: sdhc: Support HS400 mode on IMX driver

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Enables HS400 mode on mimxrt595_evk

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2022-09-08 13:23:21 -05:00 committed by Carles Cufí
parent 8e4f08f235
commit 4fe04f9a85
2 changed files with 11 additions and 1 deletions
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1
boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts
View file

@ -331,6 +331,7 @@ zephyr_udc0: &usbhs {
pinctrl-0 = <&pinmux_usdhc>; pinctrl-0 = <&pinmux_usdhc>;
pinctrl-names = "default"; pinctrl-names = "default";
mmc-hs200-1_8v; mmc-hs200-1_8v;
mmc-hs400-1_8v;
}; };
&wwdt0 { &wwdt0 {

11
drivers/sdhc/imx_usdhc.c
View file

@ -377,11 +377,20 @@ static int imx_usdhc_set_io(const struct device *dev, struct sdhc_io *ios)
imxrt_usdhc_pinmux(cfg->nusdhc, false, 2, 7); imxrt_usdhc_pinmux(cfg->nusdhc, false, 2, 7);
#endif #endif
break; break;
case SDHC_TIMING_HS400:
#if FSL_FEATURE_USDHC_HAS_HS400_MODE
USDHC_EnableHS400Mode(cfg->base, true);
USDHC_EnableDDRMode(cfg->base, true, 0U);
USDHC_ConfigStrobeDLL(cfg->base, 7U, 4U);
USDHC_EnableStrobeDLL(cfg->base, true);
#else
LOG_ERR("HS400 not supported for this device");
return -ENOTSUP;
#endif
case SDHC_TIMING_SDR104: case SDHC_TIMING_SDR104:
case SDHC_TIMING_DDR50: case SDHC_TIMING_DDR50:
case SDHC_TIMING_DDR52: case SDHC_TIMING_DDR52:
case SDHC_TIMING_HS200: case SDHC_TIMING_HS200:
case SDHC_TIMING_HS400:
#ifdef CONFIG_PINCTRL #ifdef CONFIG_PINCTRL
pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_FAST); pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_FAST);
#else #else