From 52bca037beccae7c7eccfb37a40f4625e680a95f Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Sat, 4 Feb 2017 23:29:41 -0600 Subject: [PATCH] dts: arm: Add base DTS support for STM32 Nucleo board This patch adds the base DTS and yaml files required to support DTS for the STM32L476 based Nucleo board. Change-Id: Ic606a895a25f27d2990f651d0f3c3c5d84818cfd Signed-off-by: Andy Gross --- dts/arm/Makefile | 1 + dts/arm/nucleo_l476rg.dts | 75 +++++++++++++++ dts/arm/nucleo_l476rg.fixup | 9 ++ dts/arm/stm32l476.dtsi | 158 +++++++++++++++++++++++++++++++ dts/arm/yaml/st,stm32-usart.yaml | 37 ++++++++ 5 files changed, 280 insertions(+) create mode 100644 dts/arm/nucleo_l476rg.dts create mode 100644 dts/arm/nucleo_l476rg.fixup create mode 100644 dts/arm/stm32l476.dtsi create mode 100644 dts/arm/yaml/st,stm32-usart.yaml diff --git a/dts/arm/Makefile b/dts/arm/Makefile index 3659a83811..83f95f6e3c 100644 --- a/dts/arm/Makefile +++ b/dts/arm/Makefile @@ -2,5 +2,6 @@ ifeq ($(CONFIG_HAS_DTS),y) dtb-$(CONFIG_BOARD_FRDM_K64F) = frdm_k64f.dts_compiled dtb-$(CONFIG_BOARD_HEXIWEAR_K64) = hexiwear_k64.dts_compiled dtb-$(CONFIG_BOARD_CC3200_LAUNCHXL) = cc3200_launchxl.dts_compiled +dtb-$(CONFIG_BOARD_NUCLEO_L476RG) = nucleo_l476rg.dts_compiled always := $(dtb-y) endif diff --git a/dts/arm/nucleo_l476rg.dts b/dts/arm/nucleo_l476rg.dts new file mode 100644 index 0000000000..0e06bb45c3 --- /dev/null +++ b/dts/arm/nucleo_l476rg.dts @@ -0,0 +1,75 @@ +/* + * Copyright 2015 - Maxime Coquelin + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "stm32l476.dtsi" + +/ { + model = "STMicroelectronics STM32L476RG-NUCLEO board"; + compatible = "st,stm32l476rg-nucleo", "st,stm32l476"; + + chosen { + zephyr,console = &usart2; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + + leds { + compatible = "gpio-leds"; + red { + gpios = <&gpiog 14 0>; + }; + green { + gpios = <&gpiog 13 0>; + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&clk_hse { + clock-frequency = <8000000>; +}; + +&usart2 { + status = "ok"; +}; diff --git a/dts/arm/nucleo_l476rg.fixup b/dts/arm/nucleo_l476rg.fixup new file mode 100644 index 0000000000..d4c0f39df5 --- /dev/null +++ b/dts/arm/nucleo_l476rg.fixup @@ -0,0 +1,9 @@ +/* This file is a temporary workaround for mapping of the generated information + * to the current driver definitions. This will be removed when the drivers + * are modified to handle the generated information, or the mapping of + * generated data matches the driver definitions. + */ + + +#define CONFIG_NUM_IRQS ARM_ARMV7M_NVIC_E000E100_NUM_IRQS +#define CONFIG_NUM_IRQ_PRIO_BITS ARM_ARMV7M_NVIC_E000E100_NUM_IRQ_PRIO_BITS diff --git a/dts/arm/stm32l476.dtsi b/dts/arm/stm32l476.dtsi new file mode 100644 index 0000000000..8699528054 --- /dev/null +++ b/dts/arm/stm32l476.dtsi @@ -0,0 +1,158 @@ +/* + * Copyright (c) 2016 Linaro Limited. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "armv7-m.dtsi" + +/ { + + sram0: memory { + reg = <0x20000000 0x18000>; + }; + + flash0: flash { + reg = <0x08000000 0x100000>; + }; + + clocks { + clk_hse: clk-hse { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; + }; + + soc { + usart1: uart@40013800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40013800 0x400>; + interrupts = <37>; + zephyr,irq-prio = <0>; + baud-rate = <115200>; + status = "disabled"; + }; + + usart2: uart@40004400 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004400 0x400>; + interrupts = <38>; + zephyr,irq-prio = <0>; + baud-rate = <115200>; + status = "disabled"; + }; + + usart3: uart@40004800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004800 0x400>; + interrupts = <39>; + zephyr,irq-prio = <0>; + baud-rate = <115200>; + status = "disabled"; + }; + + uart4: uart@40004c00 { + compatible = "st,stm32-uart"; + reg = <0x40004c00 0x400>; + interrupts = <52>; + zephyr,irq-prio = <0>; + baud-rate = <115200>; + status = "disabled"; + }; + + uart5: uart@40005000 { + compatible = "st,stm32-uart"; + reg = <0x40005000 0x400>; + interrupts = <53>; + zephyr,irq-prio = <0>; + baud-rate = <115200>; + status = "disabled"; + }; + + syscfg: system-config@40010000 { + compatible = "syscon"; + reg = <0x40013800 0x400>; + }; + + pin-controller { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stm32l4xx-pinctrl"; + ranges = <0 0x48000000 0x2000>; + pins-are-numbered; + + gpioa: gpio@48000000 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x0 0x400>; + st,bank-name = "GPIOA"; + }; + + gpiob: gpio@48000400 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x400 0x400>; + st,bank-name = "GPIOB"; + }; + + gpioc: gpio@48000800 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x800 0x400>; + st,bank-name = "GPIOC"; + }; + + gpiod: gpio@48000c00 { + gpio-controller; + #gpio-cells = <2>; + reg = <0xc00 0x400>; + st,bank-name = "GPIOD"; + }; + + gpioe: gpio@48001000 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1000 0x400>; + st,bank-name = "GPIOE"; + }; + + gpiof: gpio@48001400 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1400 0x400>; + st,bank-name = "GPIOF"; + }; + + gpiog: gpio@48001800 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1800 0x400>; + st,bank-name = "GPIOG"; + }; + + gpioh: gpio@48001c00 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1c00 0x400>; + st,bank-name = "GPIOH"; + }; + + }; + }; +}; + +&nvic { + num-irq-prio-bits = <4>; + num-irqs = <82>; +}; diff --git a/dts/arm/yaml/st,stm32-usart.yaml b/dts/arm/yaml/st,stm32-usart.yaml new file mode 100644 index 0000000000..380b4c435d --- /dev/null +++ b/dts/arm/yaml/st,stm32-usart.yaml @@ -0,0 +1,37 @@ +--- +title: STM32 USART +id: st,stm32-usart +version: 0.1 + +description: > + This binding gives a base representation of the STM32 USART + +inherits: + - !include uart.yaml + - !include zephyr_devices.yaml + +properties: + - compatible: + type: string + category: required + description: compatible strings + constraint: "st,stm32-usart" + + - reg: + type: array + description: mmio register space + generation: define + category: required + + - interrupts: + type: array + category: required + description: required interrupts + generation: define + + - clocks: + type: array + category: required + description: Clock gate control information + generation: define +...