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boards: fvp_baser_aemv8r: remove SOC_FVP_AEMV8R_EL2_INIT code

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Now that VMPIDR_EL2 will be initialized in z_arm64_el2_init, the code
that I wrote for initializing VMPIDR_EL2 on fvp_baser_aemv8r can be
removed.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
This commit is contained in:
Huifeng Zhang 2022-10-09 10:17:13 +08:00 committed by Stephanos Ioannidis
parent 6ae66cc13d
commit 52cdf2aaf3
3 changed files with 1 additions and 26 deletions
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2
boards/arm64/fvp_baser_aemv8r/fvp_baser_aemv8r_smp_defconfig
View file

@ -28,7 +28,7 @@ CONFIG_UART_CONSOLE=y
CONFIG_SOC_FVP_AEMV8R_SIMULATE_CPU_PM=y
CONFIG_PM_CPU_OPS=y
CONFIG_PM_CPU_OPS_PSCI=n
CONFIG_SOC_FVP_AEMV8R_EL2_INIT=y
CONFIG_ARM64_SET_VMPIDR_EL2=y
CONFIG_SMP=y
CONFIG_MP_NUM_CPUS=4

7
soc/arm64/arm/fvp_aemv8r/Kconfig.soc
View file

@ -22,10 +22,3 @@ config SOC_FVP_AEMV8R_SIMULATE_CPU_PM
FVP_BaseR_AEMv8R. When zephyr kernel try to bring up secondary
core through pm_cpu_on(), it always succeeds because
it indeed bring up secondary core successfully.
config SOC_FVP_AEMV8R_EL2_INIT
bool "ARM FVP AEMv8R EL2 Initialization"
default n
help
Initialize MPIDR_EL1 in z_arm64_el2_plat_init. It's necessary
when zephyr brings up secondary core without TB-R support.

18
soc/arm64/arm/fvp_aemv8r/soc.c
View file

@ -4,24 +4,6 @@
*/
#include <zephyr/kernel.h>
#ifdef CONFIG_SOC_FVP_AEMV8R_EL2_INIT
void z_arm64_el2_plat_init(void)
{
uint64_t reg;
/*
* The purpose of VMPIDR_EL2 is that holds the value of the
* Virtualization Multiprocessor ID and this is the value returned
* by EL1 reads of MPIDR_EL1.
* Normally The VMPIDR_EL2 is configurated by TB-R.
*/
reg = read_mpidr_el1();
write_vmpidr_el2(reg);
}
#endif
#ifdef CONFIG_SOC_FVP_AEMV8R_SIMULATE_CPU_PM
/*