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dts: nxp: Convert ENET DT default to new binding.

Browse source 
Convert all of the NXP SOCs with ENET to use the new
binding scheme, which is used by the new driver.

Convert any boards using this SOC to the new scheme as well,
and remove from the documentation the bit about the experimental
nature of the new driver and the overlay that shall no longer exist.

Some of the boards I do not have the hardware of, so apologies
if something breaks, as I have no way to know. All the boards
were made sure to at least build.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2024-03-18 18:42:55 -05:00 committed by Alberto Escolar
parent fdbba0341c
commit 537d5c310c
44 changed files with 485 additions and 1158 deletions
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10
boards/nxp/frdm_k64f/doc/index.rst
View file

@ -391,13 +391,3 @@ of pyocd commands:
.. _OpenSDA Serial and Debug Adapter:
https://www.nxp.com/design/microcontrollers-developer-resources/ides-for-kinetis-mcus/opensda-serial-and-debug-adapter:OPENSDA#FRDM-K64F
Experimental ENET Driver
========================
Current default ethernet driver is eth_mcux, with binding `nxp,kinetis-ethernet`. There is a new
driver with binding `nxp,enet`, which is experimental and undergoing development, but will have
enhanced capability, such as not hardcoding code for only one phy in the driver like eth_mcux.
To build for this EVK with the new driver, include the experimental overlay to west build with
the option `-DEXTRA_DTC_OVERLAY_FILE=nxp,enet-experimental.overlay`.

109
boards/nxp/frdm_k64f/dts/nxp,enet-experimental.overlay
View file

@ -1,109 +0,0 @@
/*
* Copyright 2023 NXP
*
* Experimental ENET binding overlay
*/
/ {
soc {
/delete-node/ ethernet@400c0000;
enet: ethernet@400c0000 {
compatible = "nxp,enet";
reg = <0x400c0000 0x620>;
clocks = <&sim KINETIS_SIM_ENET_CLK 0 0>;
enet_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <83 0>, <84 0>, <85 0>;
interrupt-names = "TX", "RX", "ERR";
nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
phy-connection-type = "rmii";
status = "disabled";
};
enet_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
interrupts = <82 0>;
interrupt-names = "IEEE1588_TMR";
status = "disabled";
};
};
};
};
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,interface-type = "rmii-25MHz";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
&pinctrl {
/delete-node/ ptp_default;
/delete-node/ enet_default;
pinmux_enet: pinmux_enet {
group1 {
pinmux = <RMII0_RXER_PTA5>,
<RMII0_RXD1_PTA12>,
<RMII0_RXD0_PTA13>,
<RMII0_CRS_DV_PTA14>,
<RMII0_TXEN_PTA15>,
<RMII0_TXD0_PTA16>,
<RMII0_TXD1_PTA17>;
drive-strength = "low";
slew-rate = "fast";
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <RMII0_MDIO_PTB0>;
drive-strength = "low";
drive-open-drain;
bias-pull-up;
slew-rate = "fast";
};
group1 {
pinmux = <RMII0_MDC_PTB1>;
drive-strength = "low";
slew-rate = "fast";
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <ENET0_1588_TMR0_PTC16>,
<ENET0_1588_TMR1_PTC17>,
<ENET0_1588_TMR2_PTC18>;
drive-strength = "low";
slew-rate = "fast";
};
};
};

35
boards/nxp/frdm_k64f/frdm_k64f-pinctrl.dtsi
View file

@ -26,7 +26,21 @@
};
};
enet_default: enet_default {
pinmux_enet: pinmux_enet {
group1 {
pinmux = <RMII0_RXER_PTA5>,
<RMII0_RXD1_PTA12>,
<RMII0_RXD0_PTA13>,
<RMII0_CRS_DV_PTA14>,
<RMII0_TXEN_PTA15>,
<RMII0_TXD0_PTA16>,
<RMII0_TXD1_PTA17>;
drive-strength = "low";
slew-rate = "fast";
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <RMII0_MDIO_PTB0>;
drive-strength = "low";
@ -35,14 +49,17 @@
slew-rate = "fast";
};
group1 {
pinmux = <RMII0_RXER_PTA5>,
<RMII0_RXD1_PTA12>,
<RMII0_RXD0_PTA13>,
<RMII0_CRS_DV_PTA14>,
<RMII0_TXEN_PTA15>,
<RMII0_TXD0_PTA16>,
<RMII0_TXD1_PTA17>,
<RMII0_MDC_PTB1>;
pinmux = <RMII0_MDC_PTB1>;
drive-strength = "low";
slew-rate = "fast";
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <ENET0_1588_TMR0_PTC16>,
<ENET0_1588_TMR1_PTC17>,
<ENET0_1588_TMR2_PTC18>;
drive-strength = "low";
slew-rate = "fast";
};

30
boards/nxp/frdm_k64f/frdm_k64f.dts
View file

@ -252,16 +252,32 @@ zephyr_udc0: &usbotg {
};
};
&enet {
&enet_mac {
status = "okay";
pinctrl-0 = <&enet_default>;
pinctrl-names = "default";
ptp {
/* Be aware that PTC16 and PTC17 are also used for uart3 */
status = "disabled";
pinctrl-0 = <&ptp_default>;
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
phy-connection-type = "rmii";
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,interface-type = "rmii-25MHz";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
&flexcan0 {

2
boards/nxp/mimxrt1020_evk/doc/index.rst
View file

@ -106,8 +106,6 @@ already supported, which can also be re-used on this mimxrt1020_evk board:
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| ENET | on-chip | ethernet |
+-----------+------------+-------------------------------------+
| USB | on-chip | USB device |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |

13
boards/nxp/mimxrt1020_evk/mimxrt1020_evk.dts
View file

@ -160,19 +160,6 @@ arduino_serial: &lpuart2 {
pinctrl-names = "default";
};
&enet {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
int-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
ptp {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
};
zephyr_udc0: &usb1 {
status = "okay";
};

10
boards/nxp/mimxrt1024_evk/doc/index.rst
View file

@ -299,13 +299,3 @@ should see the following message in the terminal:
.. _i.MX RT1024 Reference Manual:
https://www.nxp.com/webapp/Download?colCode=IMXRT1024RM
Experimental ENET Driver
========================
Current default ethernet driver is eth_mcux, with binding `nxp,kinetis-ethernet`. There is a new
driver with binding `nxp,enet`, which is experimental and undergoing development, but will have
enhanced capability, such as not hardcoding code for only one phy in the driver like eth_mcux.
To build for this EVK with the new driver, include the experimental overlay to west build with
the option `-DEXTRA_DTC_OVERLAY_FILE=nxp,enet-experimental.overlay`.

136
boards/nxp/mimxrt1024_evk/dts/nxp,enet-experimental.overlay
View file

@ -1,136 +0,0 @@
/*
* Copyright 2023 NXP
*
* Experimental ENET binding overlay
*/
/ {
soc {
/delete-node/ ethernet@402d8000;
enet: enet@402d8000 {
compatible = "nxp,enet";
reg = <0x402D8000 0x628>;
clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
enet_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <114 0>;
interrupt-names = "COMMON";
nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
phy-connection-type = "rmii";
status = "disabled";
};
enet_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
interrupts = <115 0>;
status = "disabled";
clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
};
};
};
};
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
&pinctrl {
/delete-node/ pinmux_ptp;
/delete-node/ pinmux_enet;
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_08_enet_ref_clk>;
bias-disable;
drive-strength = "r0-6";
slew-rate = "fast";
nxp,speed = "50-mhz";
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_ad_b0_09_enet_rx_data1>,
<&iomuxc_gpio_ad_b0_11_enet_rx_en>,
<&iomuxc_gpio_ad_b0_14_enet_tx_data0>,
<&iomuxc_gpio_ad_b0_15_enet_tx_data1>,
<&iomuxc_gpio_ad_b0_13_enet_tx_en>,
<&iomuxc_gpio_ad_b0_12_enet_rx_er>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
group2 {
pinmux = <&iomuxc_gpio_ad_b0_10_enet_rx_data0>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_emc_40_enet_mdio>,
<&iomuxc_gpio_emc_41_enet_mdc>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
group2 {
pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "100-mhz";
};
};
pinmux_ptp: pinmux_ptp {
/* Intentionally empty */
};
};

49
boards/nxp/mimxrt1024_evk/mimxrt1024_evk-pinctrl.dtsi
View file

@ -20,7 +20,6 @@
};
};
/* Note: USER_LED conflicts with ENET_RST */
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_08_enet_ref_clk>;
@ -31,21 +30,29 @@
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "100-mhz";
};
group2 {
pinmux = <&iomuxc_gpio_ad_b0_09_enet_rx_data1>,
<&iomuxc_gpio_ad_b0_11_enet_rx_en>,
<&iomuxc_gpio_ad_b0_14_enet_tx_data0>,
<&iomuxc_gpio_ad_b0_15_enet_tx_data1>,
<&iomuxc_gpio_ad_b0_13_enet_tx_en>,
<&iomuxc_gpio_ad_b0_12_enet_rx_er>,
<&iomuxc_gpio_emc_40_enet_mdio>,
<&iomuxc_gpio_ad_b0_12_enet_rx_er>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
group2 {
pinmux = <&iomuxc_gpio_ad_b0_10_enet_rx_data0>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_emc_40_enet_mdio>,
<&iomuxc_gpio_emc_41_enet_mdc>;
drive-strength = "r0-5";
bias-pull-up;
@ -53,7 +60,7 @@
slew-rate = "fast";
nxp,speed = "200-mhz";
};
group3 {
group1 {
pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>;
drive-strength = "r0-5";
bias-pull-up;
@ -61,14 +68,20 @@
slew-rate = "slow";
nxp,speed = "100-mhz";
};
group4 {
pinmux = <&iomuxc_gpio_ad_b0_10_enet_rx_data0>;
drive-strength = "r0-6";
slew-rate = "slow";
group2 {
pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "100-mhz";
};
};
pinmux_ptp: pinmux_ptp {
/* Intentionally empty */
};
pinmux_flexcan1: pinmux_flexcan1 {
group0 {
pinmux = <&iomuxc_gpio_sd_b1_00_flexcan1_tx>,
@ -173,10 +186,6 @@
};
};
/* intentionally left empty */
pinmux_ptp: pinmux_ptp {
};
pinmux_sai3: pinmux_sai3 {
group0 {
pinmux = <&iomuxc_gpio_sd_b1_06_sai3_tx_bclk>,

26
boards/nxp/mimxrt1024_evk/mimxrt1024_evk.dts
View file

@ -123,18 +123,34 @@ arduino_serial: &lpuart2 {
};
};
&enet {
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
int-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
ptp {
phy-handle = <&phy>;
zephyr,random-mac-address;
phy-connection-type = "rmii";
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
};
&lpuart1 {
status = "okay";

10
boards/nxp/mimxrt1050_evk/doc/index.rst
View file

@ -486,13 +486,3 @@ Current Zephyr build supports the new MIMXRT1050-EVKB
.. _Enable QSPI flash support in SEGGER JLink:
https://wiki.segger.com/i.MXRT1050#QSPI_flash
Experimental ENET Driver
========================
Current default ethernet driver is eth_mcux, with binding `nxp,kinetis-ethernet`. There is a new
driver with binding `nxp,enet`, which is experimental and undergoing development, but will have
enhanced capability, such as not hardcoding code for only one phy in the driver like eth_mcux.
To build for this EVK with the new driver, include the experimental overlay to west build with
the option `-DEXTRA_DTC_OVERLAY_FILE=nxp,enet-experimental.overlay`.

123
boards/nxp/mimxrt1050_evk/dts/nxp,enet-experimental.overlay
View file

@ -1,123 +0,0 @@
/*
* Copyright 2023 NXP
*
* Experimental ENET binding overlay
*/
/ {
soc {
/delete-node/ ethernet@402d8000;
enet: enet@402d8000 {
compatible = "nxp,enet";
reg = <0x402D8000 0x628>;
clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
enet_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <114 0>;
interrupt-names = "COMMON";
nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
phy-connection-type = "rmii";
status = "disabled";
};
enet_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
interrupts = <115 0>;
status = "disabled";
clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
};
};
};
};
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
&pinctrl {
/delete-node/ pinmux_ptp;
/delete-node/ pinmux_enet;
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
bias-disable;
drive-strength = "r0-6";
slew-rate = "fast";
nxp,speed = "50-mhz";
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
<&iomuxc_gpio_b1_05_enet_rx_data1>,
<&iomuxc_gpio_b1_06_enet_rx_en>,
<&iomuxc_gpio_b1_07_enet_tx_data0>,
<&iomuxc_gpio_b1_08_enet_tx_data1>,
<&iomuxc_gpio_b1_09_enet_tx_en>,
<&iomuxc_gpio_b1_11_enet_rx_er>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
<&iomuxc_gpio_emc_41_enet_mdio>,
<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
};

48
boards/nxp/mimxrt1050_evk/mimxrt1050_evk-pinctrl.dtsi
View file

@ -50,7 +50,6 @@
};
};
/* Note: USER_LED conflicts with ENET_RST */
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
@ -61,24 +60,13 @@
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_ad_b0_10_gpio1_io10>,
<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "100-mhz";
};
group2 {
pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
<&iomuxc_gpio_b1_05_enet_rx_data1>,
<&iomuxc_gpio_b1_06_enet_rx_en>,
<&iomuxc_gpio_b1_07_enet_tx_data0>,
<&iomuxc_gpio_b1_08_enet_tx_data1>,
<&iomuxc_gpio_b1_09_enet_tx_en>,
<&iomuxc_gpio_b1_11_enet_rx_er>,
<&iomuxc_gpio_emc_40_enet_mdc>,
<&iomuxc_gpio_emc_41_enet_mdio>;
<&iomuxc_gpio_b1_11_enet_rx_er>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
@ -87,6 +75,30 @@
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
<&iomuxc_gpio_emc_41_enet_mdio>,
<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
/* conflicts with SAI1 */
pinmux_flexcan1: pinmux_flexcan1 {
group0 {
@ -310,16 +322,6 @@
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_sai1: pinmux_sai1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_09_sai1_mclk>,

28
boards/nxp/mimxrt1050_evk/mimxrt1050_evk.dts
View file

@ -193,17 +193,33 @@ arduino_serial: &lpuart3 {
pinctrl-names = "default";
};
&enet {
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
int-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
ptp {
phy-handle = <&phy>;
zephyr,random-mac-address;
phy-connection-type = "rmii";
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
status = "okay";
};
};
zephyr_udc0: &usb1 {

10
boards/nxp/mimxrt1060_evk/doc/index.rst
View file

@ -474,13 +474,3 @@ connected to the EVK properly. See :ref:`Using J-Link RT1060` for more details.
.. _Using J-Link with MIMXRT1060-EVKB:
https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Using-J-Link-with-MIMXRT1060-EVKB/ta-p/1452717
Experimental ENET Driver
========================
Current default ethernet driver is eth_mcux, with binding `nxp,kinetis-ethernet`. There is a new
driver with binding `nxp,enet`, which is experimental and undergoing development, but will have
enhanced capability, such as not hardcoding code for only one phy in the driver like eth_mcux.
To build for this EVK with the new driver, include the experimental overlay to west build with
the option `-DEXTRA_DTC_OVERLAY_FILE=nxp,enet-experimental.overlay`.

123
boards/nxp/mimxrt1060_evk/dts/nxp,enet-experimental.overlay
View file

@ -1,123 +0,0 @@
/*
* Copyright 2023 NXP
*
* Experimental ENET binding overlay
*/
/ {
soc {
/delete-node/ ethernet@402d8000;
enet: enet@402d8000 {
compatible = "nxp,enet";
reg = <0x402D8000 0x628>;
clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
enet_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <114 0>;
interrupt-names = "COMMON";
nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
phy-connection-type = "rmii";
status = "disabled";
};
enet_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
interrupts = <115 0>;
status = "disabled";
clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
};
};
};
};
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
&pinctrl {
/delete-node/ pinmux_ptp;
/delete-node/ pinmux_enet;
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
bias-disable;
drive-strength = "r0-6";
slew-rate = "fast";
nxp,speed = "50-mhz";
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
<&iomuxc_gpio_b1_05_enet_rx_data1>,
<&iomuxc_gpio_b1_06_enet_rx_en>,
<&iomuxc_gpio_b1_07_enet_tx_data0>,
<&iomuxc_gpio_b1_08_enet_tx_data1>,
<&iomuxc_gpio_b1_09_enet_tx_en>,
<&iomuxc_gpio_b1_11_enet_rx_er>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
<&iomuxc_gpio_emc_41_enet_mdio>,
<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
};

49
boards/nxp/mimxrt1060_evk/mimxrt1060_evk-pinctrl.dtsi
View file

@ -50,7 +50,6 @@
};
};
/* Note: USER_LED conflicts with ENET_RST */
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
@ -61,24 +60,13 @@
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_ad_b0_10_gpio1_io10>,
<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "100-mhz";
};
group2 {
pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
<&iomuxc_gpio_b1_05_enet_rx_data1>,
<&iomuxc_gpio_b1_06_enet_rx_en>,
<&iomuxc_gpio_b1_07_enet_tx_data0>,
<&iomuxc_gpio_b1_08_enet_tx_data1>,
<&iomuxc_gpio_b1_09_enet_tx_en>,
<&iomuxc_gpio_b1_11_enet_rx_er>,
<&iomuxc_gpio_emc_40_enet_mdc>,
<&iomuxc_gpio_emc_41_enet_mdio>;
<&iomuxc_gpio_b1_11_enet_rx_er>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
@ -87,6 +75,31 @@
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
<&iomuxc_gpio_emc_41_enet_mdio>,
<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_flexcan3: pinmux_flexcan3 {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_14_flexcan3_tx>,
@ -306,16 +319,6 @@
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_sai1: pinmux_sai1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_09_sai1_mclk>,

28
boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dts
View file

@ -164,17 +164,33 @@ arduino_i2c: &lpi2c1 {
pinctrl-names = "default", "sleep";
};
&enet {
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
int-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
ptp {
phy-handle = <&phy>;
zephyr,random-mac-address;
phy-connection-type = "rmii";
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
status = "okay";
};
};
&adc1 {

16
boards/nxp/mimxrt1062_fmurt6/mimxrt1062_fmurt6.dts
View file

@ -386,11 +386,23 @@
nxp,prescaler = <64>;
};
&enet2 {
&enet2_mac {
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
zephyr,random-mac-address;
phy-connection-type = "rmii";
phy-handle = <&phy>;
};
&enet2_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-addr = <0>;
phy: phy@0 {
compatible = "ethernet-phy";
reg = <0>;
status = "okay";
};
};
zephyr_udc0: &usb1 {

123
boards/nxp/mimxrt1064_evk/dts/nxp,enet-experimental.overlay
View file

@ -1,123 +0,0 @@
/*
* Copyright 2023 NXP
*
* Experimental ENET binding overlay
*/
/ {
soc {
/delete-node/ ethernet@402d8000;
enet: enet@402d8000 {
compatible = "nxp,enet";
reg = <0x402D8000 0x628>;
clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
enet_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <114 0>;
interrupt-names = "COMMON";
nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
phy-connection-type = "rmii";
status = "disabled";
};
enet_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
interrupts = <115 0>;
status = "disabled";
clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
};
};
};
};
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
&pinctrl {
/delete-node/ pinmux_ptp;
/delete-node/ pinmux_enet;
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
bias-disable;
drive-strength = "r0-6";
slew-rate = "fast";
nxp,speed = "50-mhz";
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
<&iomuxc_gpio_b1_05_enet_rx_data1>,
<&iomuxc_gpio_b1_06_enet_rx_en>,
<&iomuxc_gpio_b1_07_enet_tx_data0>,
<&iomuxc_gpio_b1_08_enet_tx_data1>,
<&iomuxc_gpio_b1_09_enet_tx_en>,
<&iomuxc_gpio_b1_11_enet_rx_er>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
<&iomuxc_gpio_emc_41_enet_mdio>,
<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
};

48
boards/nxp/mimxrt1064_evk/mimxrt1064_evk-pinctrl.dtsi
View file

@ -50,7 +50,6 @@
};
};
/* Note: USER_LED conflicts with ENET_RST */
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
@ -61,24 +60,13 @@
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_ad_b0_10_gpio1_io10>,
<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "100-mhz";
};
group2 {
pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
<&iomuxc_gpio_b1_05_enet_rx_data1>,
<&iomuxc_gpio_b1_06_enet_rx_en>,
<&iomuxc_gpio_b1_07_enet_tx_data0>,
<&iomuxc_gpio_b1_08_enet_tx_data1>,
<&iomuxc_gpio_b1_09_enet_tx_en>,
<&iomuxc_gpio_b1_11_enet_rx_er>,
<&iomuxc_gpio_emc_40_enet_mdc>,
<&iomuxc_gpio_emc_41_enet_mdio>;
<&iomuxc_gpio_b1_11_enet_rx_er>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
@ -87,6 +75,30 @@
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
<&iomuxc_gpio_emc_41_enet_mdio>,
<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
/* conflicts with SAI1 */
pinmux_flexcan1: pinmux_flexcan1 {
group0 {
@ -291,16 +303,6 @@
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_sai1: pinmux_sai1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_09_sai1_mclk>,

29
boards/nxp/mimxrt1064_evk/mimxrt1064_evk.dts
View file

@ -236,19 +236,36 @@ arduino_serial: &lpuart3 {
pinctrl-names = "default", "sleep";
};
&enet {
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
int-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
ptp {
phy-handle = <&phy>;
zephyr,random-mac-address;
phy-connection-type = "rmii";
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
status = "okay";
};
};
zephyr_udc0: &usb1 {
status = "okay";
};

10
boards/nxp/mimxrt1160_evk/doc/index.rst
View file

@ -356,13 +356,3 @@ should see the following message in the terminal:
.. _AN13264:
https://www.nxp.com/docs/en/application-note/AN13264.pdf
Experimental ENET Driver
========================
Current default ethernet driver is eth_mcux, with binding `nxp,kinetis-ethernet`. There is a new
driver with binding `nxp,enet`, which is experimental and undergoing development, but will have
enhanced capability, such as not hardcoding code for only one phy in the driver like eth_mcux.
To build for this EVK with the new driver, include the experimental overlay to west build with
the option `-DEXTRA_DTC_OVERLAY_FILE=nxp,enet-experimental.overlay`.

124
boards/nxp/mimxrt1160_evk/dts/nxp,enet-experimental.overlay
View file

@ -1,124 +0,0 @@
/*
* Copyright 2023 NXP
*
* Experimental ENET binding overlay
*/
/ {
soc {
/delete-node/ ethernet@40424000;
enet: ethernet@40424000 {
compatible = "nxp,enet";
reg = <0x40424000 0x628>;
clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
enet_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <137 0>;
interrupt-names = "COMMON";
nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
status = "disabled";
};
enet_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
interrupts = <138 0>;
status = "disabled";
clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
};
};
};
};
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
phy-connection-type = "rmii";
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio12 12 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio9 11 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
&pinctrl {
/delete-node/ pinmux_ptp;
/delete-node/ pinmux_enet;
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_ad_12_gpio9_io11>,
<&iomuxc_gpio_disp_b2_08_enet_rx_en>,
<&iomuxc_gpio_disp_b2_09_enet_rx_er>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
group1 {
pinmux = <&iomuxc_gpio_disp_b2_06_enet_rdata00>,
<&iomuxc_gpio_disp_b2_07_enet_rdata01>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
input-enable;
};
group2 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_12_gpio12_io12>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
group3 {
pinmux = <&iomuxc_gpio_disp_b2_02_enet_tdata00>,
<&iomuxc_gpio_disp_b2_03_enet_tdata01>,
<&iomuxc_gpio_disp_b2_04_enet_tx_en>;
drive-strength = "high";
slew-rate = "fast";
};
group4 {
pinmux = <&iomuxc_gpio_disp_b2_05_enet_ref_clk>;
drive-strength = "high";
slew-rate = "slow";
input-enable;
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_ad_32_enet_mdc>,
<&iomuxc_gpio_ad_33_enet_mdio>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_ptp: pinmux_ptp {
};
};

20
boards/nxp/mimxrt1160_evk/mimxrt1160_evk-pinctrl.dtsi
View file

@ -56,9 +56,7 @@
slew-rate = "fast";
};
group3 {
pinmux = <&iomuxc_gpio_ad_32_enet_mdc>,
<&iomuxc_gpio_ad_33_enet_mdio>,
<&iomuxc_gpio_disp_b2_02_enet_tdata00>,
pinmux = <&iomuxc_gpio_disp_b2_02_enet_tdata00>,
<&iomuxc_gpio_disp_b2_03_enet_tdata01>,
<&iomuxc_gpio_disp_b2_04_enet_tx_en>;
drive-strength = "high";
@ -72,6 +70,18 @@
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_ad_32_enet_mdc>,
<&iomuxc_gpio_ad_33_enet_mdio>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_ptp: pinmux_ptp {
};
pinmux_flexcan3: pinmux_flexcan3 {
group0 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_01_can3_rx>,
@ -219,10 +229,6 @@
};
};
/* intentionally left empty */
pinmux_ptp: pinmux_ptp {
};
pinmux_sai1: pinmux_sai1 {
group0 {
pinmux = <&iomuxc_gpio_ad_17_sai1_mclk>,

26
boards/nxp/mimxrt1160_evk/mimxrt1160_evk.dtsi
View file

@ -133,14 +133,34 @@
pinctrl-names = "default";
};
&enet {
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
ptp {
phy-handle = <&phy>;
phy-connection-type = "rmii";
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio12 12 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio9 11 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
};
&csi {
pinctrl-0 = <&pinmux_csi>;

9
boards/nxp/mimxrt1160_evk/mimxrt1160_evk_mimxrt1166_cm7.dts
View file

@ -84,15 +84,6 @@
status = "okay";
};
&enet {
status = "okay";
int-gpios = <&gpio9 11 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio12 12 GPIO_ACTIVE_HIGH>;
ptp {
status = "okay";
};
};
zephyr_udc0: &usb1 {
status = "okay";
};

10
boards/nxp/mimxrt1170_evk/doc/index.rst
View file

@ -444,13 +444,3 @@ should see the following message in the terminal:
.. _NXP MCUXpresso for Visual Studio Code:
https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/mcuxpresso-for-visual-studio-code:MCUXPRESSO-VSC
Experimental ENET Driver
========================
Current default ethernet driver is eth_mcux, with binding `nxp,kinetis-ethernet`. There is a new
driver with binding `nxp,enet`, which is experimental and undergoing development, but will have
enhanced capability, such as not hardcoding code for only one phy in the driver like eth_mcux.
To build for this EVK with the new driver, include the experimental overlay to west build with
the option `-DEXTRA_DTC_OVERLAY_FILE=nxp,enet-experimental.overlay`.

124
boards/nxp/mimxrt1170_evk/dts/nxp,enet-experimental.overlay
View file

@ -1,124 +0,0 @@
/*
* Copyright 2023 NXP
*
* Experimental ENET binding overlay
*/
/ {
soc {
/delete-node/ ethernet@40424000;
enet: ethernet@40424000 {
compatible = "nxp,enet";
reg = <0x40424000 0x628>;
clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
enet_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <137 0>;
interrupt-names = "COMMON";
nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
status = "disabled";
};
enet_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
interrupts = <138 0>;
status = "disabled";
clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
};
};
};
};
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
phy-connection-type = "rmii";
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio12 12 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio9 11 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
&pinctrl {
/delete-node/ pinmux_ptp;
/delete-node/ pinmux_enet;
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_ad_12_gpio9_io11>,
<&iomuxc_gpio_disp_b2_08_enet_rx_en>,
<&iomuxc_gpio_disp_b2_09_enet_rx_er>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
group1 {
pinmux = <&iomuxc_gpio_disp_b2_06_enet_rdata00>,
<&iomuxc_gpio_disp_b2_07_enet_rdata01>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
input-enable;
};
group2 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_12_gpio12_io12>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
group3 {
pinmux = <&iomuxc_gpio_disp_b2_02_enet_tdata00>,
<&iomuxc_gpio_disp_b2_03_enet_tdata01>,
<&iomuxc_gpio_disp_b2_04_enet_tx_en>;
drive-strength = "high";
slew-rate = "fast";
};
group4 {
pinmux = <&iomuxc_gpio_disp_b2_05_enet_ref_clk>;
drive-strength = "high";
slew-rate = "slow";
input-enable;
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_ad_32_enet_mdc>,
<&iomuxc_gpio_ad_33_enet_mdio>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_ptp: pinmux_ptp {
};
};

20
boards/nxp/mimxrt1170_evk/mimxrt1170_evk-pinctrl.dtsi
View file

@ -56,9 +56,7 @@
slew-rate = "fast";
};
group3 {
pinmux = <&iomuxc_gpio_ad_32_enet_mdc>,
<&iomuxc_gpio_ad_33_enet_mdio>,
<&iomuxc_gpio_disp_b2_02_enet_tdata00>,
pinmux = <&iomuxc_gpio_disp_b2_02_enet_tdata00>,
<&iomuxc_gpio_disp_b2_03_enet_tdata01>,
<&iomuxc_gpio_disp_b2_04_enet_tx_en>;
drive-strength = "high";
@ -72,6 +70,18 @@
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_ad_32_enet_mdc>,
<&iomuxc_gpio_ad_33_enet_mdio>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_ptp: pinmux_ptp {
};
pinmux_flexcan3: pinmux_flexcan3 {
group0 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_01_can3_rx>,
@ -219,10 +229,6 @@
};
};
/* intentionally left empty */
pinmux_ptp: pinmux_ptp {
};
pinmux_sai1: pinmux_sai1 {
group0 {
pinmux = <&iomuxc_gpio_ad_17_sai1_mclk>,

26
boards/nxp/mimxrt1170_evk/mimxrt1170_evk.dtsi
View file

@ -96,14 +96,34 @@
pinctrl-names = "default";
};
&enet {
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
ptp {
phy-handle = <&phy>;
phy-connection-type = "rmii";
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
mc,reset-gpio = <&gpio12 12 GPIO_ACTIVE_HIGH>;
mc,interrupt-gpio = <&gpio9 11 GPIO_ACTIVE_HIGH>;
mc,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
};
&csi {
pinctrl-0 = <&pinmux_csi>;

8
boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7.dts
View file

@ -128,14 +128,6 @@ nxp_mipi_i2c: &lpi2c5 {
status = "okay";
};
&enet {
status = "okay";
int-gpios = <&gpio9 11 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio12 12 GPIO_ACTIVE_HIGH>;
ptp {
status = "okay";
};
};
&sai1 {
status = "okay";

11
boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.overlay
View file

@ -70,7 +70,12 @@
/delete-node/ fxos8700@1f;
};
/* Disable ethernet, as PHY is not supported */
&enet {
status = "disabled";
&enet_mdio {
/delete-node/ phy@0;
phy: phy@0 {
compatible = "ethernet-phy";
reg = <0>;
status = "okay";
};
};

13
boards/nxp/rddrone_fmuk66/rddrone_fmuk66-pinctrl.dtsi
View file

@ -10,7 +10,7 @@
#include <nxp/kinetis/MK66FN2M0VMD18-pinctrl.h>
&pinctrl {
enet_default: enet_default {
mdio_default: mdio_default {
group0 {
pinmux = <RMII0_MDIO_PTB0>;
drive-strength = "low";
@ -19,14 +19,21 @@
slew-rate = "fast";
};
group1 {
pinmux = <RMII0_MDC_PTB1>;
drive-strength = "low";
slew-rate = "fast";
};
};
enet_default: enet_default {
group0 {
pinmux = <RMII0_RXER_PTA5>,
<RMII0_RXD1_PTA12>,
<RMII0_RXD0_PTA13>,
<RMII0_CRS_DV_PTA14>,
<RMII0_TXEN_PTA15>,
<RMII0_TXD1_PTA17>,
<RMII0_TXD0_PTA16>,
<RMII0_MDC_PTB1>;
<RMII0_TXD0_PTA16>;
drive-strength = "low";
slew-rate = "fast";
};

16
boards/nxp/rddrone_fmuk66/rddrone_fmuk66.dts
View file

@ -263,10 +263,24 @@ zephyr_udc0: &usbotg {
};
};
&enet {
&enet_mac {
status = "okay";
pinctrl-0 = <&enet_default>;
pinctrl-names = "default";
phy-connection-type = "rmii";
phy-handle = <&phy>;
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&mdio_default>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "ethernet-phy";
reg = <0>;
status = "okay";
};
};
&flexcan0 {

16
boards/pjrc/teensy4/teensy40.dts
View file

@ -76,9 +76,23 @@ zephyr_udc0: &usb1 {
};
/* Pinmux settings */
&enet {
&enet_mac {
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
zephyr,random-mac-address;
phy-connection-type = "rmii";
phy-handle = <&phy>;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "ethernet-phy";
reg = <0>;
status = "okay";
};
};
&flexcan1 {

20
boards/segger/ip_k66f/ip_k66f.dts
View file

@ -103,14 +103,24 @@
};
};
&enet {
&enet_mac {
status = "okay";
pinctrl-0 = <&enet_default>;
pinctrl-names = "default";
zephyr,random-mac-address;
phy-connection-type = "rmii";
phy-handle = <&phy>;
};
fixed-link {
speed = <100>;
full-duplex;
&enet_mdio {
status = "okay";
pinctrl-0 = <&enet_default>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "ethernet-phy";
reg = <0>;
status = "okay";
fixed-link = "100BASE-T Full-Duplex";
};
};
@ -131,7 +141,7 @@
spi-cpol;
spi-cpha;
dsa-master-port = <&enet>;
dsa-master-port = <&enet_mac>;
dsa-slave-ports = <3>;
lan3: lan_3 {

8
boards/shields/esp_8266/boards/frdm_k64f.overlay
View file

@ -4,9 +4,15 @@
* SPDX-License-Identifier: Apache-2.0
*/
&enet {
/* ENET MUST be disabled because share
* pins with UART-3
*/
&enet_mac {
status = "disabled";
};
&enet_mdio {
status = "disabled";
};
&enet_ptp_clock {
status = "disabled";
};

22
dts/arm/nxp/nxp_k6x.dtsi
View file

@ -475,18 +475,30 @@
};
enet: ethernet@400c0000 {
compatible = "nxp,kinetis-ethernet";
compatible = "nxp,enet";
reg = <0x400c0000 0x620>;
clocks = <&sim KINETIS_SIM_ENET_CLK 0 0>;
enet_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <83 0>, <84 0>, <85 0>;
interrupt-names = "TX", "RX", "ERR";
nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
phy-connection-type = "rmii";
status = "disabled";
phy-addr = <0>;
clocks = <&sim KINETIS_SIM_CORESYS_CLK 0 0>;
ptp: ptp {
compatible = "nxp,kinetis-ptp";
};
enet_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
interrupts = <82 0>;
interrupt-names = "IEEE1588_TMR";
clocks = <&sim KINETIS_SIM_ENET_1588_CLK 0 0>;
status = "disabled";
};
};

2
dts/arm/nxp/nxp_rt1010.dtsi
View file

@ -239,7 +239,7 @@
/delete-node/ flexpwm@403e8000;
/* Remove Ethernet, it does'nt exist on RT1010 */
/delete-node/ ethernet@402d8000;
/delete-node/ enet@402d8000;
/* Fixup USB it has different base addr and interrupt numbers on RT1010 */
/delete-node/ usbd@402e0000;

21
dts/arm/nxp/nxp_rt1060.dtsi
View file

@ -49,16 +49,29 @@
soc {
/* i.MX rt1060 has a second Ethernet controller. */
enet2: ethernet@402d4000 {
compatible = "nxp,kinetis-ethernet";
reg = <0x402D4000 0x628>;
compatible = "nxp,enet";
reg = <0x402D8000 0x628>;
clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
enet2_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <152 0>;
interrupt-names = "COMMON";
nxp,mdio = <&enet2_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
status = "disabled";
ptp {
compatible = "nxp,kinetis-ptp";
};
enet2_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet2_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
status = "disabled";
interrupts = <153 0>;
interrupt-names = "IEEE1588_TMR";
clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
};
};

23
dts/arm/nxp/nxp_rt10xx.dtsi
View file

@ -767,18 +767,29 @@
};
};
enet: ethernet@402d8000 {
compatible = "nxp,kinetis-ethernet";
enet: enet@402d8000 {
compatible = "nxp,enet";
reg = <0x402D8000 0x628>;
clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
enet_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <114 0>;
interrupt-names = "COMMON";
nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
status = "disabled";
phy-addr = <0>;
ptp: ptp {
compatible = "nxp,kinetis-ptp";
};
enet_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
interrupts = <115 0>;
interrupt-names = "IEEE1588_TMR";
status = "disabled";
clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
};
};

21
dts/arm/nxp/nxp_rt11xx.dtsi
View file

@ -707,17 +707,28 @@
};
enet: ethernet@40424000 {
compatible = "nxp,kinetis-ethernet";
compatible = "nxp,enet";
reg = <0x40424000 0x628>;
clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
enet_mac: ethernet {
compatible = "nxp,enet-mac";
interrupts = <137 0>;
interrupt-names = "COMMON";
nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>;
status = "disabled";
phy-addr = <2>;
ptp: ptp {
compatible = "nxp,kinetis-ptp";
};
enet_mdio: mdio {
compatible = "nxp,enet-mdio";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
enet_ptp_clock: ptp_clock {
compatible = "nxp,enet-ptp-clock";
interrupts = <138 0>;
interrupt-names = "IEEE1588_TMR";
status = "disabled";
clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
};
};

2
samples/net/dsa/boards/ip_k66f.overlay
View file

@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
&enet {
&enet_mac {
local-mac-address = [00 00 12 13 00 10];
};