drivers: i2c: i2c_dw: update DMA node access in I2C dw
Update DMA node access from paren-node to dmas property in dts instance. Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
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a0ce427848
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53b717edd6
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@ -74,9 +74,10 @@ void cb_i2c_idma_transfer(const struct device *dma, void *user_data,
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uint32_t channel, int status)
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{
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const struct device *dev = (const struct device *)user_data;
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const struct i2c_dw_rom_config * const rom = dev->config;
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struct i2c_dw_dev_config *const dw = dev->data;
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dma_stop(dw->dma_dev, channel);
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dma_stop(rom->dma_dev, channel);
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i2c_dw_enable_idma(dev, false);
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if (status) {
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@ -104,11 +105,12 @@ inline void *i2c_dw_dr_phy_addr(const struct device *dev)
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int32_t i2c_dw_idma_rx_transfer(const struct device *dev)
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{
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struct i2c_dw_dev_config *const dw = dev->data;
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const struct i2c_dw_rom_config * const rom = dev->config;
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struct dma_config dma_cfg = { 0 };
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struct dma_block_config dma_block_cfg = { 0 };
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if (!device_is_ready(dw->dma_dev)) {
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if (!device_is_ready(rom->dma_dev)) {
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LOG_DBG("DMA device is not ready");
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return -ENODEV;
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}
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@ -131,12 +133,12 @@ int32_t i2c_dw_idma_rx_transfer(const struct device *dev)
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dma_block_cfg.source_address = (uint64_t)i2c_dw_dr_phy_addr(dev);
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dw->xfr_status = false;
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if (dma_config(dw->dma_dev, DMA_INTEL_LPSS_RX_CHAN, &dma_cfg)) {
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if (dma_config(rom->dma_dev, DMA_INTEL_LPSS_RX_CHAN, &dma_cfg)) {
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LOG_DBG("Error transfer");
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return -EIO;
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}
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if (dma_start(dw->dma_dev, DMA_INTEL_LPSS_RX_CHAN)) {
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if (dma_start(rom->dma_dev, DMA_INTEL_LPSS_RX_CHAN)) {
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LOG_DBG("Error transfer");
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return -EIO;
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}
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@ -150,12 +152,13 @@ int32_t i2c_dw_idma_rx_transfer(const struct device *dev)
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int32_t i2c_dw_idma_tx_transfer(const struct device *dev,
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uint64_t data)
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{
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const struct i2c_dw_rom_config * const rom = dev->config;
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struct i2c_dw_dev_config *const dw = dev->data;
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struct dma_config dma_cfg = { 0 };
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struct dma_block_config dma_block_cfg = { 0 };
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if (!device_is_ready(dw->dma_dev)) {
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if (!device_is_ready(rom->dma_dev)) {
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LOG_DBG("DMA device is not ready");
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return -ENODEV;
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}
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@ -178,12 +181,12 @@ int32_t i2c_dw_idma_tx_transfer(const struct device *dev,
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dma_block_cfg.dest_address = (uint64_t)i2c_dw_dr_phy_addr(dev);
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dw->xfr_status = false;
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if (dma_config(dw->dma_dev, DMA_INTEL_LPSS_TX_CHAN, &dma_cfg)) {
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if (dma_config(rom->dma_dev, DMA_INTEL_LPSS_TX_CHAN, &dma_cfg)) {
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LOG_DBG("Error transfer");
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return -EIO;
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}
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if (dma_start(dw->dma_dev, DMA_INTEL_LPSS_TX_CHAN)) {
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if (dma_start(rom->dma_dev, DMA_INTEL_LPSS_TX_CHAN)) {
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LOG_DBG("Error trnasfer");
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return -EIO;
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}
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@ -390,8 +393,9 @@ static void i2c_dw_isr(const struct device *port)
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uint32_t stat = sys_read32(reg_base + IDMA_REG_INTR_STS);
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if (stat & IDMA_TX_RX_CHAN_MASK) {
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const struct i2c_dw_rom_config * const rom = port->config;
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/* Handle the DMA interrupt */
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dma_intel_lpss_isr(dw->dma_dev);
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dma_intel_lpss_isr(rom->dma_dev);
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}
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#endif
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@ -1049,11 +1053,11 @@ static int i2c_dw_initialize(const struct device *dev)
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pcie_set_cmd(rom->pcie->bdf, PCIE_CONF_CMDSTAT_MASTER, true);
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#ifdef CONFIG_I2C_DW_LPSS_DMA
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size_t nhdls = 0;
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const device_handle_t *hdls;
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uintptr_t base;
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hdls = device_supported_handles_get(dev, &nhdls);
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dw->dma_dev = device_from_handle(*hdls);
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base = DEVICE_MMIO_GET(dev) + DMA_INTEL_LPSS_OFFSET;
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dma_intel_lpss_set_base(rom->dma_dev, base);
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dma_intel_lpss_setup(rom->dma_dev);
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/* Assign physical & virtual address to dma instance */
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dw->phy_addr = mbar.phys_addr;
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@ -1184,6 +1188,12 @@ static int i2c_dw_initialize(const struct device *dev)
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#define I2C_CONFIG_REG_INIT(n) \
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_CONCAT(I2C_CONFIG_REG_INIT_PCIE, DT_INST_ON_BUS(n, pcie))(n)
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#define I2C_CONFIG_DMA_INIT(n) \
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COND_CODE_1(CONFIG_I2C_DW_LPSS_DMA, \
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(COND_CODE_1(DT_INST_NODE_HAS_PROP(n, dmas), \
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(.dma_dev = DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_IDX(n, 0)),), \
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())), ())
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#define I2C_DEVICE_INIT_DW(n) \
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PINCTRL_DW_DEFINE(n); \
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I2C_PCIE_DEFINE(n); \
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@ -1195,6 +1205,7 @@ static int i2c_dw_initialize(const struct device *dev)
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RESET_DW_CONFIG(n) \
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PINCTRL_DW_CONFIG(n) \
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I2C_DW_INIT_PCIE(n) \
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I2C_CONFIG_DMA_INIT(n) \
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}; \
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static struct i2c_dw_dev_config i2c_##n##_runtime; \
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I2C_DEVICE_DT_INST_DEFINE(n, i2c_dw_initialize, NULL, \
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@ -104,6 +104,10 @@ struct i2c_dw_rom_config {
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(pcie)
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struct pcie_dev *pcie;
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#endif /* I2C_DW_PCIE_ENABLED */
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#ifdef CONFIG_I2C_DW_LPSS_DMA
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const struct device *dma_dev;
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#endif
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};
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struct i2c_dw_dev_config {
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@ -124,7 +128,6 @@ struct i2c_dw_dev_config {
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uint8_t xfr_flags;
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bool support_hs_mode;
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#ifdef CONFIG_I2C_DW_LPSS_DMA
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const struct device *dma_dev;
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uintptr_t phy_addr;
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uintptr_t base_addr;
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/* For dma transfer */
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