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boards: arm: ubx_bmd380eval_nrf52840: migrate to pinctrl

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Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2022-03-17 13:43:45 +01:00 committed by Carles Cufí
parent 3e8f9bcc19
commit 5410cff32d
4 changed files with 176 additions and 38 deletions
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41
boards/arm/ubx_bmd380eval_nrf52840/doc/index.rst
View file

@ -459,15 +459,32 @@ more than one UART for connecting peripheral devices:
1. Add device tree overlay file to the main directory of your
application:
.. code-block:: console
.. code-block:: devicetree
&pinctrl {
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 14)>,
<NRF_PSEL(UART_RX, 0, 16)>;
};
};
/* required if CONFIG_PM_DEVICE=y */
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 14)>,
<NRF_PSEL(UART_RX, 0, 16)>;
low-power-enable;
};
};
};
$ cat ubx_bmd380eval_nrf52840.overlay
&uart1 {
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "okay";
tx-pin = <14>;
rx-pin = <16>;
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
In the overlay file above, pin P0.16 is used for RX and P0.14 is
@ -484,26 +501,14 @@ compiler.
Selecting the pins
==================
To select the pin numbers for tx-pin and rx-pin:
.. code-block:: console
tx-pin = <pin_no>
Open the data sheet for the BMD-380 at the `u-blox website`_, Section 2
Pins can be configured in the board pinctrl file. To see the available mappings,
open the data sheet for the BMD-380 at the `u-blox website`_, Section 2
'Pin definition'. In the table 3 select the pins marked 'GPIO'.
Note that pins marked as 'Standard drive, low frequency I/O only
(<10 kH' can only be used in under-10KHz applications.
They are not suitable for 115200 speed of UART.
Translate 'Pin' into number for Device tree by using the following
formula::
pin_no = b\*32 + a
where ``a`` and ``b`` are from the Pin value in the table (Pb.a).
For example, for P0.1, ``pin_no = 1`` and for P1.0, ``pin_no = 32``.
.. note:
Pins are defined according to the "nRF52" pin number, not the module
pad number.

129
boards/arm/ubx_bmd380eval_nrf52840/ubx_bmd380eval_nrf52840-pinctrl.dtsi Normal file
View file

@ -0,0 +1,129 @@
/*
* Copyright (c) 2022 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
low-power-enable;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
nordic,invert;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
low-power-enable;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
};
};
spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
low-power-enable;
};
};
qspi_default: qspi_default {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 20)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO3, 0, 23)>,
<NRF_PSEL(QSPI_CSN, 0, 17)>;
};
};
qspi_sleep: qspi_sleep {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 20)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO3, 0, 23)>,
<NRF_PSEL(QSPI_CSN, 0, 17)>;
low-power-enable;
};
};
};

42
boards/arm/ubx_bmd380eval_nrf52840/ubx_bmd380eval_nrf52840.dts
View file

@ -7,6 +7,7 @@
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "ubx_bmd380eval_nrf52840-pinctrl.dtsi"
/* should be ckaa, but not available yet */
/ {
@ -109,56 +110,57 @@
compatible = "nordic,nrf-uart";
status = "okay";
current-speed = <115200>;
tx-pin = <6>;
rx-pin = <8>;
rts-pin = <5>;
cts-pin = <7>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c1 {
compatible = "nordic,nrf-twi";
/* Cannot be used together with spi1. */
/* status = "okay"; */
sda-pin = <30>;
scl-pin = <31>;
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
&pwm0 {
status = "okay";
ch0-pin = <13>;
ch0-inverted;
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
/* Cannot be used together with i2c0. */
/* status = "okay"; */
sck-pin = <27>;
mosi-pin = <26>;
miso-pin = <29>;
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
sck-pin = <31>;
mosi-pin = <30>;
miso-pin = <40>;
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};
&spi2 {
compatible = "nordic,nrf-spi";
status = "disabled";
sck-pin = <19>;
mosi-pin = <20>;
miso-pin = <21>;
pinctrl-0 = <&spi2_default>;
pinctrl-1 = <&spi2_sleep>;
pinctrl-names = "default", "sleep";
};
&qspi {
status = "okay";
sck-pin = <19>;
io-pins = <20>, <21>, <22>, <23>;
csn-pins = <17>;
pinctrl-0 = <&qspi_default>;
pinctrl-1 = <&qspi_sleep>;
pinctrl-names = "default", "sleep";
mx25r64: mx25r6435f@0 {
compatible = "nordic,qspi-nor";
reg = <0>;

2
boards/arm/ubx_bmd380eval_nrf52840/ubx_bmd380eval_nrf52840_defconfig
View file

@ -29,3 +29,5 @@ CONFIG_UART_CONSOLE=y
# additional board options
CONFIG_GPIO_AS_PINRESET=y
CONFIG_PINCTRL=y