logging: adsp hda backend refinements and additional test
Additional testing showed that when using printk the logger would start sticking and spitting out nulls which is wrong. This made it appear as if the firmware had locked up. The issue seems to have been caused by the initial ipc message to read all the dma buffers on the host. Removing that, the issue seems to have been solved. This also improves the test case to ensure printk with LOG_PRINTK=y works as expected. It also adds a last log message between some timeouts of the flush timer length to ensure the padding and timer flush are working properly. Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
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@ -327,7 +327,6 @@ void adsp_hda_log_init(adsp_hda_log_hook_t fn, uint32_t channel)
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#include <cavstool.h>
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#define CHANNEL 6
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#define HOST_BUF_SIZE 8192
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#define IPC_TIMEOUT K_MSEC(1500)
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static inline void hda_ipc_msg(const struct device *dev, uint32_t data,
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@ -365,11 +364,9 @@ int adsp_hda_log_cavstool_init(const struct device *dev)
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hda_ipc_msg(INTEL_ADSP_IPC_HOST_DEV, IPCCMD_HDA_RESET, CHANNEL, IPC_TIMEOUT);
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hda_ipc_msg(INTEL_ADSP_IPC_HOST_DEV, IPCCMD_HDA_CONFIG,
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CHANNEL | (HOST_BUF_SIZE << 8), IPC_TIMEOUT);
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CHANNEL | (CONFIG_LOG_BACKEND_ADSP_HDA_SIZE << 8), IPC_TIMEOUT);
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adsp_hda_log_init(adsp_hda_log_cavstool_hook, CHANNEL);
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hda_ipc_msg(INTEL_ADSP_IPC_HOST_DEV, IPCCMD_HDA_START, CHANNEL, IPC_TIMEOUT);
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hda_ipc_msg(INTEL_ADSP_IPC_HOST_DEV, IPCCMD_HDA_PRINT,
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((HOST_BUF_SIZE*2) << 8) | CHANNEL, IPC_TIMEOUT);
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return 0;
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}
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@ -6,7 +6,7 @@ CONFIG_LOG=y
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CONFIG_LOG_MODE_IMMEDIATE=y
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CONFIG_LOG_BACKEND_ADSP=n
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CONFIG_LOG_BACKEND_ADSP_HDA=y
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CONFIG_LOG_BACKEND_ADSP_HDA_SIZE=8192
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CONFIG_LOG_BACKEND_ADSP_HDA_SIZE=2048
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CONFIG_LOG_BACKEND_ADSP_HDA_PADDING=y
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CONFIG_LOG_BACKEND_ADSP_HDA_CAVSTOOL=y
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CONFIG_LOG_BACKEND_ADSP_HDA_FLUSH_TIME=100
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@ -14,20 +14,48 @@
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(hda_test, LOG_LEVEL_DBG);
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/* Define a prime length message string (13 bytes long when including the \0 terminator)
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*
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* This helps ensure most if not all messages are not going to land on a 128 byte boundary
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* which is important to test the padding and wrapping feature
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*/
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#ifdef CONFIG_LOG_PRINTK
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#define FMT_STR "TEST:%06d\n"
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#else
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#define FMT_STR "TEST:%07d"
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#endif
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#define FMT_STR_LEN 13
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/* Now define the number of iterations such that we ensure a large number of wraps
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* on the HDA ring.
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*/
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#define TEST_ITERATIONS ((CONFIG_LOG_BACKEND_ADSP_HDA_SIZE/FMT_STR_LEN)*200)
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ZTEST(intel_adsp_hda_log, test_hda_logger)
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{
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TC_PRINT("Testing hda log backend\n");
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TC_PRINT("Testing hda log backend, log buffer size %u, iterations %u\n",
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CONFIG_LOG_BACKEND_ADSP_HDA_SIZE, TEST_ITERATIONS);
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/* Wait a moment so the output isn't mangled */
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/* Wait a moment so the output isn't mangled with the above printk */
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k_msleep(100);
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/* Ensure multiple wraps and many many logs are written */
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for (int i = 0; i < 4096; i++) {
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LOG_DBG("test hda log message %d", i);
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for (int i = 0; i < TEST_ITERATIONS; i++) {
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if (IS_ENABLED(CONFIG_LOG_PRINTK)) {
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printk(FMT_STR, i);
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} else {
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LOG_INF(FMT_STR, i);
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}
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}
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/* Wait another moment so dma may flush */
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k_sleep(K_MSEC(100));
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/* Wait for the flush to happen */
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k_msleep(CONFIG_LOG_BACKEND_ADSP_HDA_FLUSH_TIME + 10);
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/* Test the flush timer works by writing a short string */
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LOG_INF("Timeout flush working if shown");
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/* Wait again for the flush to happen */
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k_msleep(CONFIG_LOG_BACKEND_ADSP_HDA_FLUSH_TIME + 10);
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}
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ZTEST_SUITE(intel_adsp_hda_log, NULL, NULL, NULL, NULL, NULL);
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@ -1,6 +1,17 @@
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common:
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harness: console
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harness_config:
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type: multi_line
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regex:
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- "TEST:([0-9]){6,7}"
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- "Timeout flush working if shown"
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tests:
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boards.intel_adsp.hda_log:
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platform_allow: intel_adsp_cavs15 intel_adsp_cavs18 intel_adsp_cavs20 intel_adsp_cavs25
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boards.intel_adsp.hda_log.printk:
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platform_allow: intel_adsp_cavs15 intel_adsp_cavs18 intel_adsp_cavs20 intel_adsp_cavs25
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extra_configs:
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- CONFIG_LOG_PRINTK=y
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boards.intel_adsp.hda_log.1cpu:
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platform_allow: intel_adsp_cavs15 intel_adsp_cavs18 intel_adsp_cavs20 intel_adsp_cavs25
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extra_configs:
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