init: add pure_core_init level
There are devices that need are part of the architecture core the need to be initialized prior to devices that are integrated around a core to make up a complete SOC. Namely the interrupt controller in the SOC must be configured in order to allow the integrated IP blocks drivers to initialize correctly. Change-Id: I0a91e08f98516a7b7dd402ffc6494a071f1326b2 Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
This commit is contained in:
parent
c48418f2bd
commit
58a534b929
|
@ -66,4 +66,4 @@ static int generic_arc_init(struct device *arg)
|
|||
return 0;
|
||||
}
|
||||
DECLARE_DEVICE_INIT_CONFIG(generic_arc_0, "", generic_arc_init, NULL);
|
||||
pure_early_init(generic_arc_0, NULL);
|
||||
pure_core_init(generic_arc_0, NULL);
|
||||
|
|
|
@ -229,11 +229,11 @@ pure_late_init(k20_uart4, &k20_uart_dev_data[4]);
|
|||
|
||||
/**< UART Devices */
|
||||
struct device * const uart_devs[] = {
|
||||
&__initconfig_k20_uart01,
|
||||
&__initconfig_k20_uart11,
|
||||
&__initconfig_k20_uart21,
|
||||
&__initconfig_k20_uart31,
|
||||
&__initconfig_k20_uart41,
|
||||
&__initconfig_k20_uart02,
|
||||
&__initconfig_k20_uart12,
|
||||
&__initconfig_k20_uart22,
|
||||
&__initconfig_k20_uart32,
|
||||
&__initconfig_k20_uart42,
|
||||
};
|
||||
|
||||
#endif /* CONFIG_K20_UART */
|
||||
|
|
|
@ -323,4 +323,4 @@ static int fsl_frdm_k64f_init(struct device *arg)
|
|||
}
|
||||
|
||||
DECLARE_DEVICE_INIT_CONFIG(fsl_frdm_0, "", fsl_frdm_k64f_init, NULL);
|
||||
pure_early_init(fsl_frdm_0, NULL);
|
||||
pure_core_init(fsl_frdm_0, NULL);
|
||||
|
|
|
@ -217,9 +217,9 @@ pure_late_init(stellaris_uart2, NULL);
|
|||
|
||||
/**< UART Devices */
|
||||
struct device * const uart_devs[] = {
|
||||
&__initconfig_stellaris_uart01,
|
||||
&__initconfig_stellaris_uart11,
|
||||
&__initconfig_stellaris_uart21,
|
||||
&__initconfig_stellaris_uart02,
|
||||
&__initconfig_stellaris_uart12,
|
||||
&__initconfig_stellaris_uart22,
|
||||
};
|
||||
|
||||
#endif /* CONFIG_STELLARIS_UART */
|
||||
|
|
|
@ -71,4 +71,4 @@ static int ti_lm3s6965_init(struct device *arg)
|
|||
}
|
||||
|
||||
DECLARE_DEVICE_INIT_CONFIG(ti_lm3_0, "", ti_lm3s6965_init, NULL);
|
||||
pure_early_init(ti_lm3_0, NULL);
|
||||
pure_core_init(ti_lm3_0, NULL);
|
||||
|
|
|
@ -149,26 +149,26 @@ static int hpet_irq_set(struct device *unused)
|
|||
}
|
||||
|
||||
DECLARE_DEVICE_INIT_CONFIG(hpetirq, "", hpet_irq_set, NULL);
|
||||
pure_late_init(hpetirq, NULL);
|
||||
pure_core_init(hpetirq, NULL);
|
||||
|
||||
#endif /* CONFIG_HPET_TIMER */
|
||||
|
||||
#ifdef CONFIG_IOAPIC
|
||||
DECLARE_DEVICE_INIT_CONFIG(ioapic_0, "", _ioapic_init, NULL);
|
||||
pure_early_init(ioapic_0, NULL);
|
||||
pure_core_init(ioapic_0, NULL);
|
||||
|
||||
#endif /* CONFIG_IOAPIC */
|
||||
|
||||
#ifdef CONFIG_LOAPIC
|
||||
DECLARE_DEVICE_INIT_CONFIG(loapic_0, "", _loapic_init, NULL);
|
||||
pure_early_init(loapic_0, NULL);
|
||||
pure_core_init(loapic_0, NULL);
|
||||
|
||||
#endif /* CONFIG_LOAPIC */
|
||||
|
||||
#if defined(CONFIG_PIC_DISABLE)
|
||||
|
||||
DECLARE_DEVICE_INIT_CONFIG(pic_0, "", _i8259_init, NULL);
|
||||
pure_early_init(pic_0, NULL);
|
||||
pure_core_init(pic_0, NULL);
|
||||
|
||||
#endif /* CONFIG_PIC_DISABLE */
|
||||
|
||||
|
|
|
@ -161,16 +161,16 @@ struct device * const uart_devs[] = {
|
|||
#if (defined(CONFIG_EARLY_CONSOLE) && \
|
||||
defined(CONFIG_UART_CONSOLE) && \
|
||||
(CONFIG_UART_CONSOLE_INDEX == 0))
|
||||
&__initconfig_ns16550_uart00,
|
||||
#else
|
||||
&__initconfig_ns16550_uart01,
|
||||
#else
|
||||
&__initconfig_ns16550_uart02,
|
||||
#endif /* CONFIG_EARLY_CONSOLE */
|
||||
#if (defined(CONFIG_EARLY_CONSOLE) && \
|
||||
defined(CONFIG_UART_CONSOLE) && \
|
||||
(CONFIG_UART_CONSOLE_INDEX == 1))
|
||||
&__initconfig_ns16550_uart10,
|
||||
#else
|
||||
&__initconfig_ns16550_uart11,
|
||||
#else
|
||||
&__initconfig_ns16550_uart12,
|
||||
#endif /* CONFIG_EARLY_CONSOLE */
|
||||
};
|
||||
|
||||
|
|
|
@ -99,20 +99,20 @@ pure_late_init(hpetirq, NULL);
|
|||
|
||||
#ifdef CONFIG_IOAPIC
|
||||
DECLARE_DEVICE_INIT_CONFIG(ioapic_0, "", _ioapic_init, NULL);
|
||||
pure_early_init(ioapic_0, NULL);
|
||||
pure_core_init(ioapic_0, NULL);
|
||||
|
||||
#endif /* CONFIG_IOAPIC */
|
||||
|
||||
#ifdef CONFIG_LOAPIC
|
||||
DECLARE_DEVICE_INIT_CONFIG(loapic_0, "", _loapic_init, NULL);
|
||||
pure_early_init(loapic_0, NULL);
|
||||
pure_core_init(loapic_0, NULL);
|
||||
|
||||
#endif /* CONFIG_LOAPIC */
|
||||
|
||||
#if defined(CONFIG_PIC_DISABLE)
|
||||
|
||||
DECLARE_DEVICE_INIT_CONFIG(pic_0, "", _i8259_init, NULL);
|
||||
pure_early_init(pic_0, NULL);
|
||||
pure_core_init(pic_0, NULL);
|
||||
|
||||
#endif /* CONFIG_PIC_DISABLE */
|
||||
|
||||
|
|
|
@ -122,9 +122,9 @@ DECLARE_DEVICE_INIT_CONFIG(ns16550_uart0,
|
|||
#if (defined(CONFIG_EARLY_CONSOLE) && \
|
||||
defined(CONFIG_UART_CONSOLE) && \
|
||||
(CONFIG_UART_CONSOLE_INDEX == 0))
|
||||
pure_early_init(ns16550_uart0, &ns16550_uart_dev_data[0]);
|
||||
pure_core_init(ns16550_uart0, &ns16550_uart_dev_data[0]);
|
||||
#else
|
||||
pure_late_init(ns16550_uart0, &ns16550_uart_dev_data[0]);
|
||||
pure_early_init(ns16550_uart0, &ns16550_uart_dev_data[0]);
|
||||
#endif /* CONFIG_EARLY_CONSOLE */
|
||||
|
||||
|
||||
|
@ -137,9 +137,9 @@ DECLARE_DEVICE_INIT_CONFIG(ns16550_uart1,
|
|||
#if (defined(CONFIG_EARLY_CONSOLE) && \
|
||||
defined(CONFIG_UART_CONSOLE) && \
|
||||
(CONFIG_UART_CONSOLE_INDEX == 1))
|
||||
pure_early_init(ns16550_uart1, &ns16550_uart_dev_data[1]);
|
||||
pure_core_init(ns16550_uart1, &ns16550_uart_dev_data[1]);
|
||||
#else
|
||||
pure_late_init(ns16550_uart1, &ns16550_uart_dev_data[1]);
|
||||
pure_early_init(ns16550_uart1, &ns16550_uart_dev_data[1]);
|
||||
#endif /* CONFIG_EARLY_CONSOLE */
|
||||
|
||||
|
||||
|
|
|
@ -155,20 +155,20 @@ pure_late_init(hpetirq, NULL);
|
|||
|
||||
#ifdef CONFIG_IOAPIC
|
||||
DECLARE_DEVICE_INIT_CONFIG(ioapic_0, "", _ioapic_init, NULL);
|
||||
pure_early_init(ioapic_0, NULL);
|
||||
pure_core_init(ioapic_0, NULL);
|
||||
|
||||
#endif /* CONFIG_IOAPIC */
|
||||
|
||||
#ifdef CONFIG_LOAPIC
|
||||
DECLARE_DEVICE_INIT_CONFIG(loapic_0, "", _loapic_init, NULL);
|
||||
pure_early_init(loapic_0, NULL);
|
||||
pure_core_init(loapic_0, NULL);
|
||||
|
||||
#endif /* CONFIG_LOAPIC */
|
||||
|
||||
#if defined(CONFIG_PIC_DISABLE)
|
||||
|
||||
DECLARE_DEVICE_INIT_CONFIG(pic_0, "", _i8259_init, NULL);
|
||||
pure_early_init(pic_0, NULL);
|
||||
pure_core_init(pic_0, NULL);
|
||||
|
||||
#endif /* CONFIG_PIC_DISABLE */
|
||||
|
||||
|
|
|
@ -161,16 +161,16 @@ struct device * const uart_devs[] = {
|
|||
#if (defined(CONFIG_EARLY_CONSOLE) && \
|
||||
defined(CONFIG_UART_CONSOLE) && \
|
||||
(CONFIG_UART_CONSOLE_INDEX == 0))
|
||||
&__initconfig_ns16550_uart00,
|
||||
#else
|
||||
&__initconfig_ns16550_uart01,
|
||||
#else
|
||||
&__initconfig_ns16550_uart02,
|
||||
#endif /* CONFIG_EARLY_CONSOLE */
|
||||
#if (defined(CONFIG_EARLY_CONSOLE) && \
|
||||
defined(CONFIG_UART_CONSOLE) && \
|
||||
(CONFIG_UART_CONSOLE_INDEX == 1))
|
||||
&__initconfig_ns16550_uart10,
|
||||
#else
|
||||
&__initconfig_ns16550_uart11,
|
||||
#else
|
||||
&__initconfig_ns16550_uart12,
|
||||
#endif /* CONFIG_EARLY_CONSOLE */
|
||||
};
|
||||
|
||||
|
|
|
@ -370,7 +370,7 @@ void gpio_config_0_irq(struct device *port)
|
|||
|
||||
void gpio_dw_isr_0(void *unused)
|
||||
{
|
||||
gpio_dw_isr(&__initconfig_gpio_01);
|
||||
gpio_dw_isr(&__initconfig_gpio_02);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_GPIO_DW_0 */
|
||||
|
@ -412,7 +412,7 @@ void gpio_config_1_irq(struct device *port)
|
|||
|
||||
void gpio_dw_isr_1(void *unused)
|
||||
{
|
||||
gpio_dw_isr(&__initconfig_gpio_11);
|
||||
gpio_dw_isr(&__initconfig_gpio_12);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_GPIO_DW_1 */
|
||||
|
|
|
@ -652,7 +652,7 @@ void i2c_config_0_irq(struct device *port)
|
|||
|
||||
void i2c_dw_isr_0(void *unused)
|
||||
{
|
||||
i2c_dw_isr(&__initconfig_i2c_01);
|
||||
i2c_dw_isr(&__initconfig_i2c_02);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_I2C_DW_0 */
|
||||
|
|
|
@ -410,7 +410,7 @@ pure_late_init(spi_intel_port_0, &spi_intel_data_port_0);
|
|||
|
||||
void spi_intel_isr_0(void *unused)
|
||||
{
|
||||
spi_intel_isr(&__initconfig_spi_intel_port_01);
|
||||
spi_intel_isr(&__initconfig_spi_intel_port_02);
|
||||
}
|
||||
|
||||
IRQ_CONNECT_STATIC(spi_intel_irq_port_0, CONFIG_SPI_INTEL_PORT_0_IRQ,
|
||||
|
|
|
@ -34,15 +34,15 @@
|
|||
#include <device.h>
|
||||
#include <toolchain.h>
|
||||
|
||||
#define PURE 1
|
||||
#define PURE_EARLY 0
|
||||
#define PURE_LATE 1
|
||||
#define NANO_EARLY 2
|
||||
#define NANO_LATE 3
|
||||
#define MICRO_EARLY 4
|
||||
#define MICRO_LATE 5
|
||||
#define APP_EARLY 6
|
||||
#define APP_LATE 7
|
||||
#define PURE_CORE 0
|
||||
#define PURE_EARLY 1
|
||||
#define PURE_LATE 2
|
||||
#define NANO_EARLY 3
|
||||
#define NANO_LATE 4
|
||||
#define MICRO_EARLY 5
|
||||
#define MICRO_LATE 6
|
||||
#define APP_EARLY 7
|
||||
#define APP_LATE 8
|
||||
|
||||
/** @def __define_initconfig
|
||||
*
|
||||
|
@ -69,22 +69,23 @@
|
|||
.driver_data = data}
|
||||
|
||||
/* Run on interrupt stack; no {micro,nano} kernel objects available */
|
||||
#define pure_early_init(cfg, data) __define_initconfig(cfg, 0, data)
|
||||
#define pure_late_init(cfg, data) __define_initconfig(cfg, 1, data)
|
||||
#define pure_core_init(cfg, data) __define_initconfig(cfg, 0, data)
|
||||
#define pure_early_init(cfg, data) __define_initconfig(cfg, 1, data)
|
||||
#define pure_late_init(cfg, data) __define_initconfig(cfg, 2, data)
|
||||
|
||||
/* Run from nano kernel idle task; no micro kernel objects available */
|
||||
#define nano_early_init(cfg, data) __define_initconfig(cfg, 2, data)
|
||||
#define nano_late_init(cfg, data) __define_initconfig(cfg, 3, data)
|
||||
#define nano_early_init(cfg, data) __define_initconfig(cfg, 3, data)
|
||||
#define nano_late_init(cfg, data) __define_initconfig(cfg, 4, data)
|
||||
|
||||
/* Run from micro kernel idle task. */
|
||||
#define micro_early_init(cfg, data) __define_initconfig(cfg, 4, data)
|
||||
#define micro_late_init(cfg, data) __define_initconfig(cfg, 5, data)
|
||||
#define micro_early_init(cfg, data) __define_initconfig(cfg, 5, data)
|
||||
#define micro_late_init(cfg, data) __define_initconfig(cfg, 6, data)
|
||||
|
||||
/* Run in the idle task; In a nano kernel only system run after
|
||||
* nano_late_init(). In a micro kernel system after micro_late_init()
|
||||
*/
|
||||
#define app_early_init(cfg, data) __define_initconfig(cfg, 6, data)
|
||||
#define app_late_init(cfg, data) __define_initconfig(cfg, 7, data)
|
||||
#define app_early_init(cfg, data) __define_initconfig(cfg, 7, data)
|
||||
#define app_late_init(cfg, data) __define_initconfig(cfg, 8, data)
|
||||
|
||||
|
||||
#endif /* _INIT_H_ */
|
||||
|
|
|
@ -281,6 +281,7 @@ FUNC_NORETURN void _Cstart(void)
|
|||
|
||||
/* perform basic hardware initialization */
|
||||
|
||||
_sys_device_do_config_level(PURE_CORE);
|
||||
_sys_device_do_config_level(PURE_EARLY);
|
||||
_sys_device_do_config_level(PURE_LATE);
|
||||
|
||||
|
|
Loading…
Reference in a new issue