patrick/zephyr
1
0
Fork 0
Code Issues Pull requests Actions 8 Packages Projects Releases Wiki Activity

soc: st: stm32: stm32l4x: enable ART flash cache accelerator

Browse source 
Enable instruction cache, data cache and prefetching.

Signed-off-by: Gwen Weinholt <git@weinholt.net>
This commit is contained in:
Gwen Weinholt 2024-04-08 09:28:42 +02:00 committed by Carles Cufí
parent ca66e7d5e1
commit 58d204acf9
1 changed files with 6 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
soc/st/stm32/stm32l4x/soc.c
View file

@ -15,6 +15,7 @@
#include <zephyr/logging/log.h>
#include <cmsis_core.h>
#include <stm32_ll_system.h>
#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
LOG_MODULE_REGISTER(soc);
@ -30,6 +31,11 @@ LOG_MODULE_REGISTER(soc);
*/
static int stm32l4_init(void)
{
/* Enable the ART Accelerator I-cache, D-cache and prefetch */
LL_FLASH_EnableInstCache();
LL_FLASH_EnableDataCache();
LL_FLASH_EnablePrefetch();
/* Update CMSIS SystemCoreClock variable (HCLK) */
/* At reset, system core clock is set to 4 MHz from MSI */
SystemCoreClock = 4000000;