bbram: it8xxx2: Add emulator implementation
Add an emulator that supports reading and writing to the it8xxx2 bbram. Signed-off-by: Yuval Peress <peress@google.com>
This commit is contained in:
parent
af5ea66c99
commit
59675bf682
|
@ -8,6 +8,8 @@ zephyr_library_sources_ifdef(CONFIG_BBRAM_SHELL bbram_shell.c)
|
|||
zephyr_library_sources_ifdef(CONFIG_USERSPACE bbram_handlers.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_BBRAM_NPCX bbram_npcx.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_BBRAM_IT8XXX2 bbram_it8xxx2.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_BBRAM_IT8XXX2_EMUL bbram_it8xxx2_emul.c)
|
||||
zephyr_library_include_directories_ifdef(CONFIG_BBRAM_IT8XXX2 .)
|
||||
zephyr_library_sources_ifdef(CONFIG_BBRAM_EMUL bbram_emul.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_BBRAM_MICROCHIP_MCP7940N bbram_microchip_mcp7940n.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_BBRAM_XEC bbram_xec.c)
|
||||
|
|
|
@ -8,3 +8,11 @@ config BBRAM_IT8XXX2
|
|||
help
|
||||
This option enables the BBRAM driver for RISCV_ITE family of
|
||||
processors.
|
||||
|
||||
config BBRAM_IT8XXX2_EMUL
|
||||
bool "Emulator for the ITE IT81202 BBRAM driver"
|
||||
default y
|
||||
depends on BBRAM_IT8XXX2
|
||||
depends on EMUL
|
||||
help
|
||||
Enable the emulator for the ITE IT81202 BBRAM.
|
||||
|
|
|
@ -12,30 +12,34 @@
|
|||
#include <zephyr/logging/log.h>
|
||||
#include <zephyr/sys/util.h>
|
||||
|
||||
#ifndef CONFIG_BBRAM_IT8XXX2_EMUL
|
||||
#include <chip_chipregs.h>
|
||||
#else
|
||||
/* Emulation register values */
|
||||
enum bram_indices {
|
||||
BRAM_IDX_VALID_FLAGS0,
|
||||
BRAM_IDX_VALID_FLAGS1,
|
||||
BRAM_IDX_VALID_FLAGS2,
|
||||
BRAM_IDX_VALID_FLAGS3,
|
||||
};
|
||||
#endif
|
||||
|
||||
LOG_MODULE_REGISTER(bbram, CONFIG_BBRAM_LOG_LEVEL);
|
||||
#include "it8xxx2.h"
|
||||
|
||||
#define BRAM_VALID_MAGIC 0x4252414D /* "BRAM" */
|
||||
LOG_MODULE_REGISTER(it8xxx2_bbram, CONFIG_BBRAM_LOG_LEVEL);
|
||||
|
||||
#define BRAM_VALID_MAGIC 0x4252414D /* "BRAM" */
|
||||
#define BRAM_VALID_MAGIC_FIELD0 (BRAM_VALID_MAGIC & 0xff)
|
||||
#define BRAM_VALID_MAGIC_FIELD1 ((BRAM_VALID_MAGIC >> 8) & 0xff)
|
||||
#define BRAM_VALID_MAGIC_FIELD2 ((BRAM_VALID_MAGIC >> 16) & 0xff)
|
||||
#define BRAM_VALID_MAGIC_FIELD3 ((BRAM_VALID_MAGIC >> 24) & 0xff)
|
||||
|
||||
/** Device config */
|
||||
struct bbram_it8xxx2_config {
|
||||
/** BBRAM base address */
|
||||
uintptr_t base_addr;
|
||||
/** BBRAM size (Unit:bytes) */
|
||||
int size;
|
||||
};
|
||||
|
||||
static int bbram_it8xxx2_read(const struct device *dev, size_t offset, size_t size, uint8_t *data)
|
||||
{
|
||||
const struct bbram_it8xxx2_config *config = dev->config;
|
||||
|
||||
if (size < 1 || offset + size > config->size) {
|
||||
return -EFAULT;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
bytecpy(data, ((uint8_t *)config->base_addr + offset), size);
|
||||
|
@ -48,16 +52,25 @@ static int bbram_it8xxx2_write(const struct device *dev, size_t offset, size_t s
|
|||
const struct bbram_it8xxx2_config *config = dev->config;
|
||||
|
||||
if (size < 1 || offset + size > config->size) {
|
||||
return -EFAULT;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
bytecpy(((uint8_t *)config->base_addr + offset), data, size);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bbram_it8xxx2_size(const struct device *dev, size_t *size)
|
||||
{
|
||||
const struct bbram_it8xxx2_config *config = dev->config;
|
||||
|
||||
*size = config->size;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct bbram_driver_api bbram_it8xxx2_driver_api = {
|
||||
.read = bbram_it8xxx2_read,
|
||||
.write = bbram_it8xxx2_write,
|
||||
.get_size = bbram_it8xxx2_size,
|
||||
};
|
||||
|
||||
static int bbram_it8xxx2_init(const struct device *dev)
|
||||
|
@ -91,10 +104,7 @@ static int bbram_it8xxx2_init(const struct device *dev)
|
|||
}
|
||||
|
||||
#define BBRAM_INIT(inst) \
|
||||
static const struct bbram_it8xxx2_config bbram_cfg_##inst = { \
|
||||
.base_addr = DT_INST_REG_ADDR(inst), \
|
||||
.size = DT_INST_REG_SIZE(inst), \
|
||||
}; \
|
||||
BBRAM_IT8XXX2_DECL_CONFIG(inst); \
|
||||
DEVICE_DT_INST_DEFINE(inst, bbram_it8xxx2_init, NULL, NULL, &bbram_cfg_##inst, \
|
||||
PRE_KERNEL_1, CONFIG_BBRAM_INIT_PRIORITY, \
|
||||
&bbram_it8xxx2_driver_api);
|
||||
|
|
60
drivers/bbram/bbram_it8xxx2_emul.c
Normal file
60
drivers/bbram/bbram_it8xxx2_emul.c
Normal file
|
@ -0,0 +1,60 @@
|
|||
/*
|
||||
* Copyright (c) 2024 Google Inc
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/devicetree.h>
|
||||
#include <zephyr/drivers/emul.h>
|
||||
#include <zephyr/drivers/emul_bbram.h>
|
||||
|
||||
#include "it8xxx2.h"
|
||||
|
||||
#define DT_DRV_COMPAT ite_it8xxx2_bbram
|
||||
|
||||
struct bbram_it8xxx2_emul_config {
|
||||
const struct device *dev;
|
||||
};
|
||||
|
||||
#define GET_CONFIG(target) \
|
||||
((const struct bbram_it8xxx2_config \
|
||||
*)(((const struct bbram_it8xxx2_emul_config *)((target)->cfg))->dev->config))
|
||||
|
||||
static int it8xxx2_emul_backend_set_data(const struct emul *target, size_t offset, size_t count,
|
||||
const uint8_t *buffer)
|
||||
{
|
||||
const struct bbram_it8xxx2_config *config = GET_CONFIG(target);
|
||||
|
||||
if (offset + count > config->size) {
|
||||
return -ERANGE;
|
||||
}
|
||||
|
||||
bytecpy(((uint8_t *)config->base_addr + offset), buffer, count);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int it8xxx2_emul_backend_get_data(const struct emul *target, size_t offset, size_t count,
|
||||
uint8_t *buffer)
|
||||
{
|
||||
const struct bbram_it8xxx2_config *config = GET_CONFIG(target);
|
||||
|
||||
if (offset + count > config->size) {
|
||||
return -ERANGE;
|
||||
}
|
||||
|
||||
bytecpy(buffer, ((uint8_t *)config->base_addr + offset), count);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct emul_bbram_backend_api it8xxx2_emul_backend_api = {
|
||||
.set_data = it8xxx2_emul_backend_set_data,
|
||||
.get_data = it8xxx2_emul_backend_get_data,
|
||||
};
|
||||
|
||||
#define BBRAM_EMUL_INIT(inst) \
|
||||
static struct bbram_it8xxx2_emul_config bbram_it8xxx2_emul_config_##inst = { \
|
||||
.dev = DEVICE_DT_INST_GET(inst), \
|
||||
}; \
|
||||
EMUL_DT_INST_DEFINE(inst, NULL, NULL, &bbram_it8xxx2_emul_config_##inst, NULL, \
|
||||
&it8xxx2_emul_backend_api)
|
||||
|
||||
DT_INST_FOREACH_STATUS_OKAY(BBRAM_EMUL_INIT);
|
36
drivers/bbram/it8xxx2.h
Normal file
36
drivers/bbram/it8xxx2.h
Normal file
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* Copyright (c) 2024 Google Inc
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef INCLUDE_ZEPHYR_DRIVERS_BBRAM_IT8XXX2_H_
|
||||
#define INCLUDE_ZEPHYR_DRIVERS_BBRAM_IT8XXX2_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <zephyr/devicetree.h>
|
||||
|
||||
/** Device config */
|
||||
struct bbram_it8xxx2_config {
|
||||
/** BBRAM base address */
|
||||
uintptr_t base_addr;
|
||||
/** BBRAM size (Unit:bytes) */
|
||||
int size;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_BBRAM_IT8XXX2_EMUL
|
||||
#define BBRAM_IT8XXX2_DECL_CONFIG(inst) \
|
||||
static uint8_t bbram_it8xxx2_emul_buffer_##inst[DT_INST_REG_SIZE(inst)]; \
|
||||
static const struct bbram_it8xxx2_config bbram_cfg_##inst = { \
|
||||
.base_addr = (uintptr_t)bbram_it8xxx2_emul_buffer_##inst, \
|
||||
.size = DT_INST_REG_SIZE(inst), \
|
||||
}
|
||||
#else
|
||||
#define BBRAM_IT8XXX2_DECL_CONFIG(inst) \
|
||||
static const struct bbram_it8xxx2_config bbram_cfg_##inst = { \
|
||||
.base_addr = DT_INST_REG_ADDR(inst), \
|
||||
.size = DT_INST_REG_SIZE(inst), \
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* INCLUDE_ZEPHYR_DRIVERS_BBRAM_IT8XXX2_H_ */
|
Loading…
Reference in a new issue