arch: arc: fix and optimize the handling of SECT_STAT.IRM
For arc processor equiped with secureshield, SEC_STAT.IRM bit should be recorded, it determins which mode irq should return Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
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@ -295,6 +295,9 @@ exc_nest_handle:
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bset.nz r3, r3, _ARC_V2_SEC_STAT_IRM_BIT
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bclr.z r3, r3, _ARC_V2_SEC_STAT_IRM_BIT
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sflag r3
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/* save _ARC_V2_SEC_STAT */
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and r3, r3, 0xff
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push r3
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#endif
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_save_callee_saved_regs
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@ -85,9 +85,6 @@ GEN_OFFSET_SYM(_callee_saved_stack_t, r24);
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GEN_OFFSET_SYM(_callee_saved_stack_t, r25);
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GEN_OFFSET_SYM(_callee_saved_stack_t, r26);
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GEN_OFFSET_SYM(_callee_saved_stack_t, fp);
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#ifdef CONFIG_ARC_SECURE_FIRMWARE
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GEN_OFFSET_SYM(_callee_saved_stack_t, sec_stat);
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#endif
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#ifdef CONFIG_USERSPACE
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#ifdef CONFIG_ARC_HAS_SECURE
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GEN_OFFSET_SYM(_callee_saved_stack_t, kernel_sp);
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@ -94,7 +94,7 @@ SECTION_FUNC(TEXT, _rirq_exit)
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_check_nest_int_by_irq_act r0, r1
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jne _rirq_return_from_rirq
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jne _rirq_no_reschedule
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#ifdef CONFIG_STACK_SENTINEL
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bl z_check_stack_sentinel
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@ -137,6 +137,11 @@ SECTION_FUNC(TEXT, _rirq_exit)
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.balign 4
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_rirq_reschedule:
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#ifdef CONFIG_ARC_SECURE_FIRMWARE
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/* here need to remember SEC_STAT.IRM bit */
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lr r3, [_ARC_V2_SEC_STAT]
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push r3
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#endif
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/* _save_callee_saved_regs expects outgoing thread in r2 */
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_save_callee_saved_regs
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@ -219,19 +224,20 @@ _rirq_return_from_coop:
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*/
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st_s r13, [sp, ___isf_t_r13_OFFSET]
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/* stack now has the IRQ stack frame layout, pointing to r0 */
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/* fall through to rtie instruction */
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/* stack now has the IRQ stack frame layout, pointing to sp */
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/* rtie will pop the rest from the stack */
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/* fall through to rtie instruction */
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rtie
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#endif /* CONFIG_PREEMPT_ENABLED */
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.balign 4
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_rirq_return_from_firq:
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_rirq_return_from_rirq:
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#ifdef CONFIG_ARC_SECURE_FIRMWARE
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/* here need to recover SEC_STAT.IRM bit */
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pop r3
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sflag r3
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#endif
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_rirq_no_reschedule:
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rtie
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@ -164,6 +164,11 @@ return_loc:
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_switch_return_from_rirq:
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_switch_return_from_firq:
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#ifdef CONFIG_ARC_SECURE_FIRMWARE
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/* here need to recover SEC_STAT.IRM bit */
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pop r3
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sflag r3
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#endif
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lr r3, [_ARC_V2_STATUS32]
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bbit1 r3, _ARC_V2_STATUS32_AE_BIT, _return_from_exc_irq
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@ -128,10 +128,6 @@ struct _callee_saved_stack {
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u32_t r26;
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u32_t fp; /* r27 */
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#ifdef CONFIG_ARC_SECURE_FIRMWARE
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u32_t sec_stat;
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#endif
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#ifdef CONFIG_USERSPACE
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#ifdef CONFIG_ARC_HAS_SECURE
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u32_t user_sp;
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@ -38,11 +38,6 @@
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st r26, [sp, ___callee_saved_stack_t_r26_OFFSET]
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st fp, [sp, ___callee_saved_stack_t_fp_OFFSET]
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#ifdef CONFIG_ARC_SECURE_FIRMWARE
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lr r13, [_ARC_V2_SEC_STAT]
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st_s r13, [sp, ___callee_saved_stack_t_sec_stat_OFFSET]
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#endif
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#ifdef CONFIG_USERSPACE
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#ifdef CONFIG_ARC_HAS_SECURE
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#ifdef CONFIG_ARC_SECURE_FIRMWARE
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@ -146,12 +141,6 @@
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#endif
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#endif
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#ifdef CONFIG_ARC_SECURE_FIRMWARE
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ld r13, [sp, ___callee_saved_stack_t_sec_stat_OFFSET]
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sflag r13
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#endif
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ld_s r13, [sp, ___callee_saved_stack_t_r13_OFFSET]
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ld_s r14, [sp, ___callee_saved_stack_t_r14_OFFSET]
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ld_s r15, [sp, ___callee_saved_stack_t_r15_OFFSET]
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