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drivers: interrupt_controller: add intc_nrfx_clic

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Add interrupt controller driver for Nordic Semiconductor
VPR CLIC.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
This commit is contained in:
Marcin Szymczyk 2024-04-04 11:08:44 +02:00 committed by Carles Cufí
parent e4364413c2
commit 5bba170ea7
4 changed files with 62 additions and 0 deletions
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2
drivers/interrupt_controller/CMakeLists.txt
View file

@ -33,6 +33,8 @@ zephyr_library_sources_ifdef(CONFIG_VEXRISCV_LITEX_IRQ intc_vexriscv_litex.
zephyr_library_sources_ifdef(CONFIG_VIM intc_vim.c) zephyr_library_sources_ifdef(CONFIG_VIM intc_vim.c)
zephyr_library_sources_ifdef(CONFIG_NUCLEI_ECLIC intc_nuclei_eclic.c) zephyr_library_sources_ifdef(CONFIG_NUCLEI_ECLIC intc_nuclei_eclic.c)
zephyr_library_sources_ifdef(CONFIG_NUCLEI_ECLIC intc_nuclei_eclic.S) zephyr_library_sources_ifdef(CONFIG_NUCLEI_ECLIC intc_nuclei_eclic.S)
zephyr_library_sources_ifdef(CONFIG_NRFX_CLIC intc_nrfx_clic.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_CLIC intc_nrfx_clic.S)
zephyr_library_sources_ifdef(CONFIG_NXP_S32_EIRQ intc_eirq_nxp_s32.c) zephyr_library_sources_ifdef(CONFIG_NXP_S32_EIRQ intc_eirq_nxp_s32.c)
zephyr_library_sources_ifdef(CONFIG_NXP_S32_WKPU intc_wkpu_nxp_s32.c) zephyr_library_sources_ifdef(CONFIG_NXP_S32_WKPU intc_wkpu_nxp_s32.c)
zephyr_library_sources_ifdef(CONFIG_XMC4XXX_INTC intc_xmc4xxx.c) zephyr_library_sources_ifdef(CONFIG_XMC4XXX_INTC intc_xmc4xxx.c)

11
drivers/interrupt_controller/Kconfig.clic
View file

@ -10,9 +10,20 @@ config NUCLEI_ECLIC
help help
Interrupt controller for Nuclei SoC core. Interrupt controller for Nuclei SoC core.
config NRFX_CLIC
bool "VPR Core Local Interrpt Controller (CLIC)"
default y
depends on DT_HAS_NORDIC_NRF_CLIC_ENABLED
help
Interrupt controller for Nordic VPR cores.
if NUCLEI_ECLIC
config LEGACY_CLIC config LEGACY_CLIC
bool "Use the legacy clic specification" bool "Use the legacy clic specification"
depends on RISCV_HAS_CLIC depends on RISCV_HAS_CLIC
help help
Enables legacy clic, where smclicshv extension is not supported and Enables legacy clic, where smclicshv extension is not supported and
hardware vectoring is set via mode bits of mtvec. hardware vectoring is set via mode bits of mtvec.
endif # NUCLEI_ECLIC

15
drivers/interrupt_controller/intc_nrfx_clic.S Normal file
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@ -0,0 +1,15 @@
/*
* Copyright (C) 2024 Nordic Semiconductor ASA
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
/* Exports */
GTEXT(__soc_handle_irq)
/*
* No need to clear anything, pending bit is cleared by HW.
*/
SECTION_FUNC(exception.other, __soc_handle_irq)
ret

34
drivers/interrupt_controller/intc_nrfx_clic.c Normal file
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@ -0,0 +1,34 @@
/*
* Copyright (c) 2024, Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/drivers/interrupt_controller/riscv_clic.h>
#include <hal/nrf_vpr_clic.h>
void riscv_clic_irq_enable(uint32_t irq)
{
nrf_vpr_clic_int_enable_set(NRF_VPRCLIC, irq, true);
}
void riscv_clic_irq_disable(uint32_t irq)
{
nrf_vpr_clic_int_enable_set(NRF_VPRCLIC, irq, false);
}
int riscv_clic_irq_is_enabled(uint32_t irq)
{
return nrf_vpr_clic_int_enable_check(NRF_VPRCLIC, irq);
}
void riscv_clic_irq_priority_set(uint32_t irq, uint32_t pri, uint32_t flags)
{
nrf_vpr_clic_int_priority_set(NRF_VPRCLIC, irq, NRF_VPR_CLIC_INT_TO_PRIO(pri));
}
void riscv_clic_irq_set_pending(uint32_t irq)
{
nrf_vpr_clic_int_pending_set(NRF_VPRCLIC, irq);
}