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x86: add kconfigs and compiler flags for MMX and SSE*

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This adds kconfigs and compiler flags to support MMX and SSE*
instructions.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2021-01-07 16:13:52 -08:00 committed by Anas Nashif
parent ce44048d46
commit 5c649921de
4 changed files with 176 additions and 1 deletions
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97
arch/x86/Kconfig
View file

@ -18,6 +18,10 @@ config CPU_ATOM
select CPU_HAS_FPU
select ARCH_HAS_STACK_PROTECTION if X86_MMU
select ARCH_HAS_USERSPACE if X86_MMU
select X86_CPU_HAS_MMX
select X86_CPU_HAS_SSE
select X86_CPU_HAS_SSE2
select X86_CPU_HAS_SSE3
help
This option signifies the use of a CPU from the Atom family.
@ -33,6 +37,14 @@ config CPU_APOLLO_LAKE
select CPU_HAS_FPU
select ARCH_HAS_STACK_PROTECTION if X86_MMU
select ARCH_HAS_USERSPACE if X86_MMU
select X86_MMU
select X86_CPU_HAS_MMX
select X86_CPU_HAS_SSE
select X86_CPU_HAS_SSE2
select X86_CPU_HAS_SSE3
select X86_CPU_HAS_SSSE3
select X86_CPU_HAS_SSE41
select X86_CPU_HAS_SSE42
help
This option signifies the use of a CPU from the Apollo Lake family.
@ -47,16 +59,97 @@ config X86_64
select USE_SWITCH_SUPPORTED
select SCHED_IPI_SUPPORTED
select X86_MMU
select X86_CPU_HAS_MMX
select X86_CPU_HAS_SSE
select X86_CPU_HAS_SSE2
select X86_MMX
select X86_SSE
select X86_SSE2
menu "x86 Features"
config X86_CPU_HAS_MMX
bool
config X86_CPU_HAS_SSE
bool
config X86_CPU_HAS_SSE2
bool
config X86_CPU_HAS_SSE3
bool
config X86_CPU_HAS_SSSE3
bool
config X86_CPU_HAS_SSE41
bool
config X86_CPU_HAS_SSE42
bool
config X86_CPU_HAS_SSE4A
bool
if FPU || X86_64
config X86_MMX
bool "Enable MMX Support"
depends on X86_CPU_HAS_MMX
help
This option enables MMX support, and the use of MMX registers
by threads.
config X86_SSE
bool "Enable SSE Support"
depends on FPU
depends on X86_CPU_HAS_SSE
help
This option enables SSE support, and the use of SSE registers
by threads.
config X86_SSE2
bool "Enable SSE2 Support"
depends on X86_CPU_HAS_SSE2
select X86_SSE
help
This option enables SSE2 support.
config X86_SSE3
bool "Enable SSE3 Support"
depends on X86_CPU_HAS_SSE3
select X86_SSE
help
This option enables SSE3 support.
config X86_SSSE3
bool "Enable SSSE3 (Supplemental SSE3) Support"
depends on X86_CPU_HAS_SSSE3
select X86_SSE
help
This option enables Supplemental SSE3 support.
config X86_SSE41
bool "Enable SSE4.1 Support"
depends on X86_CPU_HAS_SSE41
select X86_SSE
help
This option enables SSE4.1 support.
config X86_SSE42
bool "Enable SSE4.2 Support"
depends on X86_CPU_HAS_SSE42
select X86_SSE
help
This option enables SSE4.2 support.
config X86_SSE4A
bool "Enable SSE4A Support"
depends on X86_CPU_HAS_SSE4A
select X86_SSE
help
This option enables SSE4A support.
config X86_SSE_FP_MATH
bool "Compiler-generated SSEx instructions for floating point math"
depends on X86_SSE
@ -71,6 +164,8 @@ config X86_SSE_FP_MATH
Disabling this option means that the compiler utilizes only the
x87 instruction set for floating point operations.
endif # FPU || X86_64
endmenu
config X86_KERNEL_OFFSET

42
arch/x86/ia32.cmake
View file

@ -21,6 +21,12 @@ if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
)
endif()
if(CONFIG_X86_MMX)
zephyr_cc_option(-mmmx)
else()
zephyr_cc_option(-mno-mmx)
endif()
if(CONFIG_X86_SSE)
zephyr_cc_option(-msse)
@ -30,6 +36,42 @@ if(CONFIG_X86_SSE)
zephyr_cc_option(-mfpmath=387)
endif()
if(CONFIG_X86_SSE2)
zephyr_cc_option(-msse2)
else()
zephyr_cc_option(-mno-sse2)
endif()
if(CONFIG_X86_SSE3)
zephyr_cc_option(-msse3)
else()
zephyr_cc_option(-mno-sse3)
endif()
if(CONFIG_X86_SSSE3)
zephyr_cc_option(-mssse3)
else()
zephyr_cc_option(-mno-ssse3)
endif()
if(CONFIG_X86_SSE41)
zephyr_cc_option(-msse4.1)
else()
zephyr_cc_option(-mno-sse4.1)
endif()
if(CONFIG_X86_SSE42)
zephyr_cc_option(-msse4.2)
else()
zephyr_cc_option(-mno-sse4.2)
endif()
if(CONFIG_X86_SSE4A)
zephyr_cc_option(-msse4a)
else()
zephyr_cc_option(-mno-sse4a)
endif()
else()
zephyr_cc_option(-mno-sse)
endif()

36
arch/x86/intel64.cmake
View file

@ -8,4 +8,40 @@ set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf64-x86-64")
get_property(OUTPUT_ARCH GLOBAL PROPERTY PROPERTY_OUTPUT_ARCH)
get_property(OUTPUT_FORMAT GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT)
if(CONFIG_X86_SSE)
# x86-64 by default has SSE and SSE2
# so no need to add compiler flags for them.
if(CONFIG_X86_SSE3)
zephyr_cc_option(-msse3)
else()
zephyr_cc_option(-mno-sse3)
endif()
if(CONFIG_X86_SSSE3)
zephyr_cc_option(-mssse3)
else()
zephyr_cc_option(-mno-ssse3)
endif()
if(CONFIG_X86_SSE41)
zephyr_cc_option(-msse4.1)
else()
zephyr_cc_option(-mno-sse4.1)
endif()
if(CONFIG_X86_SSE42)
zephyr_cc_option(-msse4.2)
else()
zephyr_cc_option(-mno-sse4.2)
endif()
if(CONFIG_X86_SSE4A)
zephyr_cc_option(-msse4a)
else()
zephyr_cc_option(-mno-sse4a)
endif()
endif()
add_subdirectory(core)

2
soc/x86/ia32/Kconfig.soc
View file

@ -4,4 +4,6 @@ config SOC_IA32
bool "Generic IA32 SoC"
select X86
select CPU_MINUTEIA
select X86_CPU_HAS_MMX
select X86_CPU_HAS_SSE
select ARCH_HAS_RESERVED_PAGE_FRAMES if SRAM_BASE_ADDRESS = 0