tests: drivers: dma: Refactor tests to use data relocation
Eliminates dma tests' dependency on CONFIG_NOCACHE_MEMORY=y for configuring dma data linker sections. This allows optionally relocating dma source and destination data to sram or other custom linker section on boards that don't support dma access to flash. Signed-off-by: Maureen Helm <maureen.helm@analog.com>
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@ -6,3 +6,5 @@ project(chan_blen_transfer)
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FILE(GLOB app_sources src/*.c)
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target_sources(app PRIVATE ${app_sources})
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zephyr_code_relocate(FILES src/test_dma.c LOCATION ${CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION}_RODATA_BSS)
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@ -13,10 +13,10 @@ config DMA_TRANSFER_CHANNEL_NR_1
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int "second DMA channel to use"
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default 1
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config DMA_LOOP_TRANSFER_SRAM_SECTION
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config DMA_LOOP_TRANSFER_RELOCATE_SECTION
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string "the section to place the memory buffers."
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depends on NOCACHE_MEMORY
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default ".nocache"
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depends on CODE_DATA_RELOCATION
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default "RAM"
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config DMA_LOOP_TRANSFER_NUMBER_OF_DMAS
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int "Number of DMAs to test"
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@ -5,7 +5,8 @@ CONFIG_DMA_LOOP_TRANSFER_NUMBER_OF_DMAS=2
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# Required by BDMA which only has access to
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# a NOCACHE SRAM4 section. All other DMAs also
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# has access to this section.
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CONFIG_DMA_LOOP_TRANSFER_SRAM_SECTION="SRAM4.dma"
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="SRAM4"
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# Required for SRAM4 to be non-cachable
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CONFIG_NOCACHE_MEMORY=y
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@ -22,16 +22,8 @@
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#define RX_BUFF_SIZE (48)
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#ifdef CONFIG_NOCACHE_MEMORY
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static __aligned(32) char tx_data[RX_BUFF_SIZE] __used
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__attribute__((__section__(CONFIG_DMA_LOOP_TRANSFER_SRAM_SECTION)));
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static const char TX_DATA[] = "It is harder to be kind than to be wise........";
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static __aligned(32) char rx_data[RX_BUFF_SIZE] __used
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__attribute__((__section__(CONFIG_DMA_LOOP_TRANSFER_SRAM_SECTION".dma")));
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#else
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static const char tx_data[] = "It is harder to be kind than to be wise........";
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static char rx_data[RX_BUFF_SIZE] = { 0 };
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#endif
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static __aligned(32) const char tx_data[] = "It is harder to be kind than to be wise........";
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static __aligned(32) char rx_data[RX_BUFF_SIZE] = { 0 };
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static void test_done(const struct device *dma_dev, void *arg,
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uint32_t id, int status)
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@ -53,10 +45,6 @@ static int test_task(const struct device *dma, uint32_t chan_id, uint32_t blen)
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return TC_FAIL;
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}
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#ifdef CONFIG_NOCACHE_MEMORY
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memcpy(tx_data, TX_DATA, sizeof(TX_DATA));
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#endif
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dma_cfg.channel_direction = MEMORY_TO_MEMORY;
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dma_cfg.source_data_size = 1U;
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dma_cfg.dest_data_size = 1U;
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@ -6,3 +6,5 @@ project(loop_transfer)
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FILE(GLOB app_sources src/*.c)
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target_sources(app PRIVATE ${app_sources})
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zephyr_code_relocate(FILES src/test_dma_loop.c LOCATION ${CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION}_RODATA_BSS)
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@ -9,10 +9,10 @@ config DMA_LOOP_TRANSFER_CHANNEL_NR
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int "DMA channel to use"
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default 0
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config DMA_LOOP_TRANSFER_SRAM_SECTION
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config DMA_LOOP_TRANSFER_RELOCATE_SECTION
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string "the section to place the memory buffers."
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depends on NOCACHE_MEMORY
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default ".nocache"
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depends on CODE_DATA_RELOCATION
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default "RAM"
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config DMA_LOOP_TRANSFER_NUMBER_OF_DMAS
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int "Number of DMAs to test"
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@ -4,7 +4,8 @@ CONFIG_DMA_LOOP_TRANSFER_NUMBER_OF_DMAS=2
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# Required by BDMA which only has access to
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# a NOCACHE SRAM4 section. All other DMAs also
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# has access to this section.
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CONFIG_DMA_LOOP_TRANSFER_SRAM_SECTION="SRAM4.dma"
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="SRAM4"
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# Required for SRAM4 to be non-cachable
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CONFIG_NOCACHE_MEMORY=y
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@ -33,16 +33,8 @@
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#define TRANSFER_LOOPS (4)
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#if CONFIG_NOCACHE_MEMORY
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static __aligned(32) uint8_t tx_data[CONFIG_DMA_LOOP_TRANSFER_SIZE] __used
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__attribute__((__section__(CONFIG_DMA_LOOP_TRANSFER_SRAM_SECTION)));
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static __aligned(32) uint8_t rx_data[TRANSFER_LOOPS][CONFIG_DMA_LOOP_TRANSFER_SIZE] __used
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__attribute__((__section__(CONFIG_DMA_LOOP_TRANSFER_SRAM_SECTION".dma")));
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#else
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/* this src memory shall be in RAM to support usingas a DMA source pointer.*/
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static uint8_t tx_data[CONFIG_DMA_LOOP_TRANSFER_SIZE];
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static __aligned(16) uint8_t rx_data[TRANSFER_LOOPS][CONFIG_DMA_LOOP_TRANSFER_SIZE] = { { 0 } };
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#endif
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static __aligned(32) uint8_t tx_data[CONFIG_DMA_LOOP_TRANSFER_SIZE];
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static __aligned(32) uint8_t rx_data[TRANSFER_LOOPS][CONFIG_DMA_LOOP_TRANSFER_SIZE] = { { 0 } };
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volatile uint32_t transfer_count;
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volatile uint32_t done;
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