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power: Clean up power state names

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Some of power states used numerical suffix while otthers not.
This commit adds proper suffix to all power state names.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>

f
This commit is contained in:
Piotr Zięcik 2019-02-04 15:30:57 +01:00 committed by Anas Nashif
parent c45961daae
commit 63b0df645e
22 changed files with 149 additions and 148 deletions
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28
arch/Kconfig
View file

@ -357,13 +357,6 @@ config SYS_POWER_LOW_POWER_STATES_SUPPORTED
This option signifies that the target supports the SYS_POWER_LOW_POWER_STATES
configuration option.
config SYS_POWER_STATE_CPU_LPS_SUPPORTED
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_STATE_CPU_LPS
configuration option.
config SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
# Hidden
bool
@ -378,6 +371,13 @@ config SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
This option signifies that the target supports the SYS_POWER_STATE_CPU_LPS_2
configuration option.
config SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_STATE_CPU_LPS_3
configuration option.
config SYS_POWER_DEEP_SLEEP_STATES_SUPPORTED
# Hidden
bool
@ -385,13 +385,6 @@ config SYS_POWER_DEEP_SLEEP_STATES_SUPPORTED
This option signifies that the target supports the SYS_POWER_DEEP_SLEEP_STATES
configuration option.
config SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP
configuration option.
config SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
# Hidden
bool
@ -406,6 +399,13 @@ config SYS_POWER_STATE_DEEP_SLEEP_2_SUPPORTED
This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_2
configuration option.
config SYS_POWER_STATE_DEEP_SLEEP_3_SUPPORTED
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_3
configuration option.
config BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
# Hidden
bool

28
include/power.h
View file

@ -27,27 +27,27 @@ enum power_states {
SYS_POWER_STATE_AUTO = (-2),
SYS_POWER_STATE_ACTIVE = (-1),
#ifdef CONFIG_SYS_POWER_LOW_POWER_STATES
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_SUPPORTED
SYS_POWER_STATE_CPU_LPS,
# endif
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
SYS_POWER_STATE_CPU_LPS_1,
# endif
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
SYS_POWER_STATE_CPU_LPS_2,
# endif
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
SYS_POWER_STATE_CPU_LPS_3,
# endif
#endif /* CONFIG_SYS_POWER_LOW_POWER_STATES */
#ifdef CONFIG_SYS_POWER_DEEP_SLEEP_STATES
# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
SYS_POWER_STATE_DEEP_SLEEP,
# endif
# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
SYS_POWER_STATE_DEEP_SLEEP_1,
# endif
# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_2_SUPPORTED
SYS_POWER_STATE_DEEP_SLEEP_2,
# endif
# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_3_SUPPORTED
SYS_POWER_STATE_DEEP_SLEEP_3,
# endif
#endif /* CONFIG_SYS_POWER_DEEP_SLEEP_STATES */
SYS_POWER_STATE_MAX
};
@ -73,10 +73,6 @@ static inline bool sys_pm_is_low_power_state(enum power_states state)
{
switch (state) {
#ifdef CONFIG_SYS_POWER_LOW_POWER_STATES
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_SUPPORTED
case SYS_POWER_STATE_CPU_LPS:
/* FALLTHROUGH */
# endif
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
case SYS_POWER_STATE_CPU_LPS_1:
/* FALLTHROUGH */
@ -84,6 +80,10 @@ static inline bool sys_pm_is_low_power_state(enum power_states state)
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
case SYS_POWER_STATE_CPU_LPS_2:
/* FALLTHROUGH */
# endif
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
case SYS_POWER_STATE_CPU_LPS_3:
/* FALLTHROUGH */
# endif
return true;
#endif /* CONFIG_SYS_POWER_LOW_POWER_STATES */
@ -102,10 +102,6 @@ static inline bool sys_pm_is_deep_sleep_state(enum power_states state)
{
switch (state) {
#ifdef CONFIG_SYS_POWER_DEEP_SLEEP_STATES
# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP:
/* FALLTHROUGH */
# endif
# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP_1:
/* FALLTHROUGH */
@ -113,6 +109,10 @@ static inline bool sys_pm_is_deep_sleep_state(enum power_states state)
# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_2_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP_2:
/* FALLTHROUGH */
# endif
# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_3_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP_3:
/* FALLTHROUGH */
# endif
return true;
#endif /* CONFIG_SYS_POWER_DEEP_SLEEP_STATES */

2
samples/boards/nrf52/power_mgr/Kconfig
View file

@ -2,8 +2,8 @@ config NRF5_POWER_MGMT_EXAMPLE
bool
default y
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
help
Hidden option enabling LPS_1 and LPS_2 low power states.
This is needed, as these states are implemented by this example.

44
samples/boards/nrf52/power_mgr/README.rst
View file

@ -18,9 +18,9 @@ enters idle state:
states, which are signaled using LEDs on the development kit:
A. LED1: [X], LED2: [X]: System is active, no low power state is selected.
B. LED1: [X], LED2: [ ]: System is idle, and the SYS_POWER_STATE_CPU_LPS_1
B. LED1: [X], LED2: [ ]: System is idle, and the SYS_POWER_STATE_CPU_LPS_2
state is selected.
C. LED1: [ ], LED2: [ ]: System is idle, and the SYS_POWER_STATE_CPU_LPS_2
C. LED1: [ ], LED2: [ ]: System is idle, and the SYS_POWER_STATE_CPU_LPS_3
state is selected.
2. Deep Sleep: This Power State is mapped to SYSTEM OFF state. In this mode
@ -68,8 +68,22 @@ nRF52 core output
<-- App doing busy wait for 10 Sec -->
<-- App going to sleep for 10 Sec -->
--> Entering to SYS_POWER_STATE_CPU_LPS_1 state.
--> Exited from SYS_POWER_STATE_CPU_LPS_1 state.
--> Entering to SYS_POWER_STATE_CPU_LPS_2 state.
--> Exited from SYS_POWER_STATE_CPU_LPS_2 state.
<-- App doing busy wait for 10 Sec -->
<-- App going to sleep for 30 Sec -->
--> Entering to SYS_POWER_STATE_CPU_LPS_3 state.
--> Exited from SYS_POWER_STATE_CPU_LPS_3 state.
<-- Disabling SYS_POWER_STATE_CPU_LPS_3 state --->
<-- App doing busy wait for 10 Sec -->
<-- App going to sleep for 10 Sec -->
--> Entering to SYS_POWER_STATE_CPU_LPS_2 state.
--> Exited from SYS_POWER_STATE_CPU_LPS_2 state.
<-- App doing busy wait for 10 Sec -->
@ -77,35 +91,21 @@ nRF52 core output
--> Entering to SYS_POWER_STATE_CPU_LPS_2 state.
--> Exited from SYS_POWER_STATE_CPU_LPS_2 state.
<-- Enabling SYS_POWER_STATE_CPU_LPS_3 state --->
<-- Disabling SYS_POWER_STATE_CPU_LPS_2 state --->
<-- App doing busy wait for 10 Sec -->
<-- App going to sleep for 10 Sec -->
--> Entering to SYS_POWER_STATE_CPU_LPS_1 state.
--> Exited from SYS_POWER_STATE_CPU_LPS_1 state.
<-- App doing busy wait for 10 Sec -->
<-- App going to sleep for 30 Sec -->
--> Entering to SYS_POWER_STATE_CPU_LPS_1 state.
--> Exited from SYS_POWER_STATE_CPU_LPS_1 state.
--> Entering to SYS_POWER_STATE_CPU_LPS_3 state.
--> Exited from SYS_POWER_STATE_CPU_LPS_3 state.
<-- Enabling SYS_POWER_STATE_CPU_LPS_2 state --->
<-- Disabling SYS_POWER_STATE_CPU_LPS_1 state --->
<-- App doing busy wait for 10 Sec -->
<-- App going to sleep for 10 Sec -->
<-- App doing busy wait for 10 Sec -->
<-- App going to sleep for 30 Sec -->
--> Entering to SYS_POWER_STATE_CPU_LPS_2 state.
--> Exited from SYS_POWER_STATE_CPU_LPS_2 state.
<-- Enabling SYS_POWER_STATE_CPU_LPS_1 state --->
<-- Forcing SYS_POWER_STATE_CPU_LPS_2 state --->
<-- Forcing SYS_POWER_STATE_CPU_LPS_3 state --->
<-- App doing busy wait for 10 Sec -->

4
samples/boards/nrf52/power_mgr/sample.yaml
View file

@ -8,7 +8,7 @@ tests:
harness_config:
type: multi_line
regex:
- "--> Entering to SYS_POWER_STATE_CPU_LPS_1 state."
- "--> Exited from SYS_POWER_STATE_CPU_LPS_1 state."
- "--> Entering to SYS_POWER_STATE_CPU_LPS_2 state."
- "--> Exited from SYS_POWER_STATE_CPU_LPS_2 state."
- "--> Entering to SYS_POWER_STATE_CPU_LPS_3 state."
- "--> Exited from SYS_POWER_STATE_CPU_LPS_3 state."

20
samples/boards/nrf52/power_mgr/src/main.c
View file

@ -57,28 +57,28 @@ void main(void)
switch (i) {
case 3:
printk("\n<-- Disabling %s state --->\n",
STRINGIFY(SYS_POWER_STATE_CPU_LPS_2));
sys_pm_ctrl_disable_state(SYS_POWER_STATE_CPU_LPS_2);
STRINGIFY(SYS_POWER_STATE_CPU_LPS_3));
sys_pm_ctrl_disable_state(SYS_POWER_STATE_CPU_LPS_3);
break;
case 5:
printk("\n<-- Enabling %s state --->\n",
STRINGIFY(SYS_POWER_STATE_CPU_LPS_2));
sys_pm_ctrl_enable_state(SYS_POWER_STATE_CPU_LPS_2);
STRINGIFY(SYS_POWER_STATE_CPU_LPS_3));
sys_pm_ctrl_enable_state(SYS_POWER_STATE_CPU_LPS_3);
printk("<-- Disabling %s state --->\n",
STRINGIFY(SYS_POWER_STATE_CPU_LPS_1));
sys_pm_ctrl_disable_state(SYS_POWER_STATE_CPU_LPS_1);
STRINGIFY(SYS_POWER_STATE_CPU_LPS_2));
sys_pm_ctrl_disable_state(SYS_POWER_STATE_CPU_LPS_2);
break;
case 7:
printk("\n<-- Enabling %s state --->\n",
STRINGIFY(SYS_POWER_STATE_CPU_LPS_1));
sys_pm_ctrl_enable_state(SYS_POWER_STATE_CPU_LPS_1);
STRINGIFY(SYS_POWER_STATE_CPU_LPS_2));
sys_pm_ctrl_enable_state(SYS_POWER_STATE_CPU_LPS_2);
printk("<-- Forcing %s state --->\n",
STRINGIFY(SYS_POWER_STATE_CPU_LPS_2));
sys_pm_force_power_state(SYS_POWER_STATE_CPU_LPS_2);
STRINGIFY(SYS_POWER_STATE_CPU_LPS_3));
sys_pm_force_power_state(SYS_POWER_STATE_CPU_LPS_3);
break;
default:

32
samples/boards/nrf52/power_mgr/src/power.c
View file

@ -13,8 +13,8 @@
void sys_pm_notify_lps_entry(enum power_states state)
{
switch (state) {
case SYS_POWER_STATE_CPU_LPS_1:
printk("--> Entering to SYS_POWER_STATE_CPU_LPS_1 state.\n");
case SYS_POWER_STATE_CPU_LPS_2:
printk("--> Entering to SYS_POWER_STATE_CPU_LPS_2 state.\n");
/*
* This power state is implemented by this sample.
@ -25,8 +25,8 @@ void sys_pm_notify_lps_entry(enum power_states state)
k_cpu_idle();
break;
case SYS_POWER_STATE_CPU_LPS_2:
printk("--> Entering to SYS_POWER_STATE_CPU_LPS_2 state.\n");
case SYS_POWER_STATE_CPU_LPS_3:
printk("--> Entering to SYS_POWER_STATE_CPU_LPS_3 state.\n");
/*
* This power state is implemented by this sample.
@ -37,8 +37,8 @@ void sys_pm_notify_lps_entry(enum power_states state)
k_cpu_idle();
break;
case SYS_POWER_STATE_DEEP_SLEEP:
printk("--> Entering to SYS_POWER_STATE_DEEP_SLEEP state.\n");
case SYS_POWER_STATE_DEEP_SLEEP_1:
printk("--> Entering to SYS_POWER_STATE_DEEP_SLEEP_1 state.\n");
/*
* This power mode is already implemented by the OS. It will be
@ -64,14 +64,6 @@ void sys_pm_notify_lps_entry(enum power_states state)
void sys_pm_notify_lps_exit(enum power_states state)
{
switch (state) {
case SYS_POWER_STATE_CPU_LPS_1:
printk("--> Exited from SYS_POWER_STATE_CPU_LPS_1 state.\n");
/* Perform exit from the low power state by turning on LEDs */
gpio_pin_write(gpio_port, LED_1, LED_ON);
gpio_pin_write(gpio_port, LED_2, LED_ON);
break;
case SYS_POWER_STATE_CPU_LPS_2:
printk("--> Exited from SYS_POWER_STATE_CPU_LPS_2 state.\n");
@ -80,8 +72,16 @@ void sys_pm_notify_lps_exit(enum power_states state)
gpio_pin_write(gpio_port, LED_2, LED_ON);
break;
case SYS_POWER_STATE_DEEP_SLEEP:
printk("--> Exited from SYS_POWER_STATE_DEEP_SLEEP state.\n");
case SYS_POWER_STATE_CPU_LPS_3:
printk("--> Exited from SYS_POWER_STATE_CPU_LPS_3 state.\n");
/* Perform exit from the low power state by turning on LEDs */
gpio_pin_write(gpio_port, LED_1, LED_ON);
gpio_pin_write(gpio_port, LED_2, LED_ON);
break;
case SYS_POWER_STATE_DEEP_SLEEP_1:
printk("--> Exited from SYS_POWER_STATE_DEEP_SLEEP_1 state.\n");
/* Turn on LEDs which were powered down before deep sleep. */
gpio_pin_write(gpio_port, LED_1, LED_ON);

4
soc/arc/quark_se_c1000_ss/Kconfig.soc
View file

@ -2,11 +2,11 @@
config SOC_QUARK_SE_C1000_SS
bool "Intel Quark SE C1000- Sensor Sub System"
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
select SYS_POWER_DEEP_SLEEP_STATES_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_2_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_3_SUPPORTED
select HAS_QMSI
select HAS_SPI_DW

20
soc/arc/quark_se_c1000_ss/power.c
View file

@ -27,10 +27,10 @@ static void _deep_sleep(enum power_states state)
qm_power_soc_set_ss_restore_flag();
switch (state) {
case SYS_POWER_STATE_DEEP_SLEEP_1:
case SYS_POWER_STATE_DEEP_SLEEP_2:
_power_soc_sleep();
break;
case SYS_POWER_STATE_DEEP_SLEEP_2:
case SYS_POWER_STATE_DEEP_SLEEP_3:
_power_soc_deep_sleep();
break;
default:
@ -43,21 +43,21 @@ void sys_set_power_state(enum power_states state)
{
switch (state) {
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATES))
case SYS_POWER_STATE_CPU_LPS:
case SYS_POWER_STATE_CPU_LPS_1:
qm_ss_power_cpu_ss1(QM_SS_POWER_CPU_SS1_TIMER_ON);
break;
case SYS_POWER_STATE_CPU_LPS_1:
case SYS_POWER_STATE_CPU_LPS_2:
qm_ss_power_cpu_ss2();
break;
#endif
#if (defined(CONFIG_SYS_POWER_DEEP_SLEEP_STATES))
case SYS_POWER_STATE_DEEP_SLEEP:
case SYS_POWER_STATE_DEEP_SLEEP_1:
qm_ss_power_soc_lpss_enable();
qm_power_soc_set_ss_restore_flag();
_power_soc_lpss_mode();
break;
case SYS_POWER_STATE_DEEP_SLEEP_1:
case SYS_POWER_STATE_DEEP_SLEEP_2:
case SYS_POWER_STATE_DEEP_SLEEP_3:
_deep_sleep(state);
break;
#endif
@ -70,18 +70,18 @@ void sys_power_state_post_ops(enum power_states state)
{
switch (state) {
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATES))
case SYS_POWER_STATE_CPU_LPS_1:
case SYS_POWER_STATE_CPU_LPS_2:
{
/* Expire the timer as it is disabled in SS2. */
u32_t limit = _arc_v2_aux_reg_read(_ARC_V2_TMR0_LIMIT);
_arc_v2_aux_reg_write(_ARC_V2_TMR0_COUNT, limit - 1);
}
case SYS_POWER_STATE_CPU_LPS:
case SYS_POWER_STATE_CPU_LPS_1:
__builtin_arc_seti(0);
break;
#endif
#if (defined(CONFIG_SYS_POWER_DEEP_SLEEP_STATES))
case SYS_POWER_STATE_DEEP_SLEEP:
case SYS_POWER_STATE_DEEP_SLEEP_1:
qm_ss_power_soc_lpss_disable();
/* If flag is cleared it means the system entered in
@ -97,8 +97,8 @@ void sys_power_state_post_ops(enum power_states state)
QM_SCSS_GP->gps0 &= ~QM_GPS0_BIT_SENSOR_WAKEUP;
}
break;
case SYS_POWER_STATE_DEEP_SLEEP_1:
case SYS_POWER_STATE_DEEP_SLEEP_2:
case SYS_POWER_STATE_DEEP_SLEEP_3:
/* Route RTC interrupt to the current core */
QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->rtc_0_int_mask);
__builtin_arc_seti(0);

2
soc/arc/quark_se_c1000_ss/soc_power.S
View file

@ -106,7 +106,7 @@ SECTION_FUNC(TEXT, _power_soc_lpss_mode)
sleep r0
/* If we reach this code it means the x86 core didn't put the
* system in SYS_POWER_STATE_DEEP_SLEEP_2 state while we were
* system in SYS_POWER_STATE_DEEP_SLEEP_3 state while we were
* in LPS. Then discard saved context.
*/
_discard_callee_saved_regs

8
soc/arc/quark_se_c1000_ss/soc_power.h
View file

@ -23,11 +23,11 @@ extern "C" {
/*
* Power state map:
* SYS_POWER_STATE_CPU_LPS: SS1 state with Timer ON
* SYS_POWER_STATE_CPU_LPS_1: SS1 state with Timer ON
* SYS_POWER_STATE_DEEP_SLEEP: SS2 with LPSS enabled state
* SYS_POWER_STATE_DEEP_SLEEP_1: SLEEP state
* SYS_POWER_STATE_DEEP_SLEEP_2: SLEEP state with LPMODE enabled
* SYS_POWER_STATE_CPU_LPS_2: SS1 state with Timer ON
* SYS_POWER_STATE_DEEP_SLEEP_1: SS2 with LPSS enabled state
* SYS_POWER_STATE_DEEP_SLEEP_2: SLEEP state
* SYS_POWER_STATE_DEEP_SLEEP_3: SLEEP state with LPMODE enabled
*/
#ifdef __cplusplus

2
soc/arm/nordic_nrf/nrf51/Kconfig.series
View file

@ -14,7 +14,7 @@ config SOC_SERIES_NRF51X
select CLOCK_CONTROL
select CLOCK_CONTROL_NRF
select SYS_POWER_DEEP_SLEEP_STATES_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
select XIP
select HAS_CMSIS
select HAS_NRFX

8
soc/arm/nordic_nrf/nrf51/power.c
View file

@ -15,8 +15,8 @@ void sys_set_power_state(enum power_states state)
{
switch (state) {
#ifdef CONFIG_SYS_POWER_DEEP_SLEEP_STATES
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP:
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP_1:
nrf_power_system_off();
break;
#endif
@ -32,8 +32,8 @@ void sys_power_state_post_ops(enum power_states state)
{
switch (state) {
#ifdef CONFIG_SYS_POWER_DEEP_SLEEP_STATES
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP:
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP_1:
/* Nothing to do. */
break;
#endif

2
soc/arm/nordic_nrf/nrf52/Kconfig.series
View file

@ -15,7 +15,7 @@ config SOC_SERIES_NRF52X
select CLOCK_CONTROL
select CLOCK_CONTROL_NRF
select SYS_POWER_DEEP_SLEEP_STATES_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
select XIP
select HAS_CMSIS
select HAS_NRFX

8
soc/arm/nordic_nrf/nrf52/power.c
View file

@ -15,8 +15,8 @@ void sys_set_power_state(enum power_states state)
{
switch (state) {
#ifdef CONFIG_SYS_POWER_DEEP_SLEEP_STATES
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP:
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP_1:
nrf_power_system_off();
break;
#endif
@ -32,8 +32,8 @@ void sys_power_state_post_ops(enum power_states state)
{
switch (state) {
#ifdef CONFIG_SYS_POWER_DEEP_SLEEP_STATES
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP:
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
case SYS_POWER_STATE_DEEP_SLEEP_1:
/* Nothing to do. */
break;
#endif

2
soc/arm/nordic_nrf/nrf91/Kconfig.series
View file

@ -17,7 +17,7 @@ config SOC_SERIES_NRF91X
select CLOCK_CONTROL
select CLOCK_CONTROL_NRF
select SYS_POWER_DEEP_SLEEP_STATES_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
select XIP
select HAS_CMSIS
select HAS_NRFX

4
soc/x86/intel_quark/quark_se/Kconfig.series
View file

@ -12,12 +12,12 @@ config SOC_SERIES_QUARK_SE
select LOAPIC_TIMER
select XIP
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
select SYS_POWER_DEEP_SLEEP_STATES_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
select SYS_POWER_STATE_DEEP_SLEEP_2_SUPPORTED
select BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
select HAS_QMSI
help

20
soc/x86/intel_quark/quark_se/power.c
View file

@ -45,10 +45,10 @@ static void _deep_sleep(enum power_states state)
qm_power_soc_set_x86_restore_flag();
switch (state) {
case SYS_POWER_STATE_DEEP_SLEEP:
case SYS_POWER_STATE_DEEP_SLEEP_1:
_power_soc_sleep();
break;
case SYS_POWER_STATE_DEEP_SLEEP_1:
case SYS_POWER_STATE_DEEP_SLEEP_2:
_power_soc_deep_sleep();
break;
default:
@ -61,19 +61,19 @@ void sys_set_power_state(enum power_states state)
{
switch (state) {
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATES))
case SYS_POWER_STATE_CPU_LPS:
case SYS_POWER_STATE_CPU_LPS_1:
qm_power_cpu_c1();
break;
case SYS_POWER_STATE_CPU_LPS_1:
case SYS_POWER_STATE_CPU_LPS_2:
qm_power_cpu_c2();
break;
case SYS_POWER_STATE_CPU_LPS_2:
case SYS_POWER_STATE_CPU_LPS_3:
qm_power_cpu_c2lp();
break;
#endif
#if (defined(CONFIG_SYS_POWER_DEEP_SLEEP_STATES))
case SYS_POWER_STATE_DEEP_SLEEP:
case SYS_POWER_STATE_DEEP_SLEEP_1:
case SYS_POWER_STATE_DEEP_SLEEP_2:
_deep_sleep(state);
break;
#endif
@ -86,20 +86,20 @@ void sys_power_state_post_ops(enum power_states state)
{
switch (state) {
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATES))
case SYS_POWER_STATE_CPU_LPS_2:
case SYS_POWER_STATE_CPU_LPS_3:
*_REG_TIMER_ICR = 1U;
case SYS_POWER_STATE_CPU_LPS_2:
case SYS_POWER_STATE_CPU_LPS_1:
case SYS_POWER_STATE_CPU_LPS:
__asm__ volatile("sti");
break;
#endif
#if (defined(CONFIG_SYS_POWER_DEEP_SLEEP_STATES))
case SYS_POWER_STATE_DEEP_SLEEP_1:
case SYS_POWER_STATE_DEEP_SLEEP_2:
#ifdef CONFIG_ARC_INIT
_arc_init(NULL);
#endif /* CONFIG_ARC_INIT */
/* Fallthrough */
case SYS_POWER_STATE_DEEP_SLEEP:
case SYS_POWER_STATE_DEEP_SLEEP_1:
__asm__ volatile("sti");
break;
#endif

10
soc/x86/intel_quark/quark_se/soc_power.h
View file

@ -23,11 +23,11 @@ extern "C" {
/*
* Power state map:
* SYS_POWER_STATE_CPU_LPS: C1 state
* SYS_POWER_STATE_CPU_LPS_1: C2 state
* SYS_POWER_STATE_CPU_LPS_2: C2LP state
* SYS_POWER_STATE_DEEP_SLEEP: SLEEP state
* SYS_POWER_STATE_DEEP_SLEEP_1: SLEEP state with LPMODE enabled
* SYS_POWER_STATE_CPU_LPS_1: C1 state
* SYS_POWER_STATE_CPU_LPS_2: C2 state
* SYS_POWER_STATE_CPU_LPS_3: C2LP state
* SYS_POWER_STATE_DEEP_SLEEP_1: SLEEP state
* SYS_POWER_STATE_DEEP_SLEEP_2: SLEEP state with LPMODE enabled
*/
/**

33
subsys/power/policy/Kconfig
View file

@ -22,46 +22,47 @@ endchoice
if SYS_PM_POLICY_RESIDENCY
config SYS_PM_LPS_MIN_RES
int "LPS minimum residency"
depends on SYS_POWER_STATE_CPU_LPS_SUPPORTED
default 5
help
Minimum residency in ticks to enter LPS state.
config SYS_PM_LPS_1_MIN_RES
int "LPS_1 minimum residency"
depends on SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
default 10
default 5
help
Minimum residency in ticks to enter LPS_1 state.
config SYS_PM_LPS_2_MIN_RES
int "LPS_2 minimum residency"
depends on SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
default 30
default 10
help
Minimum residency in ticks to enter LPS_2 state.
config SYS_PM_DEEP_SLEEP_MIN_RES
int "DEEP_SLEEP minimum residency"
depends on SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
default 60
config SYS_PM_LPS_3_MIN_RES
int "Low Power State 3 minimum residency"
depends on SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
default 30
help
Minimum residency in ticks to enter DEEP_SLEEP state.
Minimum residency in ticks to enter SYS_POWER_STATE_CPU_LPS_3 state.
config SYS_PM_DEEP_SLEEP_1_MIN_RES
int "DEEP_SLEEP_1 minimum residency"
depends on SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
default 90
default 60
help
Minimum residency in ticks to enter DEEP_SLEEP_1 state.
config SYS_PM_DEEP_SLEEP_2_MIN_RES
int "DEEP_SLEEP_2 minimum residency"
depends on SYS_POWER_STATE_DEEP_SLEEP_2_SUPPORTED
default 120
default 90
help
Minimum residency in ticks to enter DEEP_SLEEP_2 state.
config SYS_PM_DEEP_SLEEP_3_MIN_RES
int "Deep Sleep State 3 minimum residency"
depends on SYS_POWER_STATE_DEEP_SLEEP_3_SUPPORTED
default 120
help
Minimum residency in ticks to enter SYS_POWER_STATE_DEEP_SLEEP_3
state.
endif # SYS_PM_POLICY_RESIDENCY

12
subsys/power/policy/policy_residency.c
View file

@ -16,10 +16,6 @@ LOG_MODULE_DECLARE(power);
/* PM Policy based on SoC/Platform residency requirements */
static const unsigned int pm_min_residency[] = {
#ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_SUPPORTED
CONFIG_SYS_PM_LPS_MIN_RES * SECS_TO_TICKS,
#endif
#ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
CONFIG_SYS_PM_LPS_1_MIN_RES * SECS_TO_TICKS,
#endif
@ -28,8 +24,8 @@ static const unsigned int pm_min_residency[] = {
CONFIG_SYS_PM_LPS_2_MIN_RES * SECS_TO_TICKS,
#endif
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
CONFIG_SYS_PM_DEEP_SLEEP_MIN_RES * SECS_TO_TICKS,
#ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
CONFIG_SYS_PM_LPS_3_MIN_RES * SECS_TO_TICKS,
#endif
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_1_SUPPORTED
@ -39,6 +35,10 @@ static const unsigned int pm_min_residency[] = {
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_2_SUPPORTED
CONFIG_SYS_PM_DEEP_SLEEP_2_MIN_RES * SECS_TO_TICKS,
#endif
#ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_3_SUPPORTED
CONFIG_SYS_PM_DEEP_SLEEP_3_MIN_RES * SECS_TO_TICKS,
#endif
};
enum power_states sys_pm_policy_next_state(s32_t ticks)

4
tests/kernel/profiling/profiling_api/Kconfig
View file

@ -2,9 +2,9 @@ config KERNEL_PROFILING_API_TEST
bool
default y
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
help
Hidden option enabling LPS power state regardless of hardware
Hidden option enabling LPS_0 power state regardless of hardware
support. This ensures that power management hooks used in this
test to profile idle thread will be executed.