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riscv: Introduce BitManip extensions

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Add Zba, Zbb, Zbc and Zbs BitManip extensions.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit is contained in:
Carlo Caione 2022-06-13 23:20:58 +02:00 committed by Carles Cufí
parent 5fece03d7d
commit 6503795dc1
2 changed files with 52 additions and 0 deletions
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36
arch/riscv/Kconfig.isa
View file

@ -110,3 +110,39 @@ config RISCV_ISA_EXT_ZIFENCEI
The "Zifencei" extension includes the FENCE.I instruction that
provides explicit synchronization between writes to instruction
memory and instruction fetches on the same hart.
config RISCV_ISA_EXT_ZBA
bool
help
(Zba) - Zba BitManip Extension
The Zba instructions can be used to accelerate the generation of
addresses that index into arrays of basic types (halfword, word,
doubleword) using both unsigned word-sized and XLEN-sized indices: a
shifted index is added to a base address.
config RISCV_ISA_EXT_ZBB
bool
help
(Zbb) - Zbb BitManip Extension (Basic bit-manipulation)
The Zbb instructions can be used for basic bit-manipulation (logical
with negate, count leading / trailing zero bits, count population,
etc...).
config RISCV_ISA_EXT_ZBC
bool
help
(Zbc) - Zbc BitManip Extension (Carry-less multiplication)
The Zbc instructions can be used for carry-less multiplication that
is the multiplication in the polynomial ring over GF(2).
config RISCV_ISA_EXT_ZBS
bool
help
(Zbs) - Zbs BitManip Extension (Single-bit instructions)
The Zbs instructions can be used for single-bit instructions that
provide a mechanism to set, clear, invert, or extract a single bit in
a register.

16
cmake/compiler/gcc/target_riscv.cmake
View file

@ -53,5 +53,21 @@ if(CONFIG_RISCV_ISA_EXT_ZIFENCEI)
string(CONCAT riscv_march ${riscv_march} "_zifencei")
endif()
if(CONFIG_RISCV_ISA_EXT_ZBA)
string(CONCAT riscv_march ${riscv_march} "_zba")
endif()
if(CONFIG_RISCV_ISA_EXT_ZBB)
string(CONCAT riscv_march ${riscv_march} "_zbb")
endif()
if(CONFIG_RISCV_ISA_EXT_ZBC)
string(CONCAT riscv_march ${riscv_march} "_zbc")
endif()
if(CONFIG_RISCV_ISA_EXT_ZBS)
string(CONCAT riscv_march ${riscv_march} "_zbs")
endif()
list(APPEND TOOLCHAIN_C_FLAGS -mabi=${riscv_mabi} -march=${riscv_march})
list(APPEND TOOLCHAIN_LD_FLAGS NO_SPLIT -mabi=${riscv_mabi} -march=${riscv_march})