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twister: s/riscv(32|64)/riscv

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Only riscv is supported now, any 32/64-bit requirements need to use
CONFIG_64BIT now.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2024-02-07 11:26:32 +01:00 committed by Alberto Escolar
parent 6c0a5cac06
commit 6810a53297
45 changed files with 49 additions and 60 deletions
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2
boards/riscv/adp_xc7k_ae350/adp_xc7k_ae350.yaml
View file

@ -1,7 +1,7 @@
identifier: adp_xc7k_ae350
name: Andes ADP-XC7K AE350
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
- cross-compile

2
boards/riscv/beaglev_fire/beaglev_fire.yaml
View file

@ -1,7 +1,7 @@
identifier: beaglev_fire
name: Beagleboard BeagleV-Fire
type: mcu
arch: riscv64
arch: riscv
toolchain:
- zephyr
ram: 3840

2
boards/riscv/esp32c3_devkitm/esp32c3_devkitm.yaml
View file

@ -1,7 +1,7 @@
identifier: esp32c3_devkitm
name: ESP32-C3
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
supported:

2
boards/riscv/esp32c3_luatos_core/esp32c3_luatos_core.yaml
View file

@ -1,7 +1,7 @@
identifier: esp32c3_luatos_core
name: ESP32C3 LuatOS Core
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
supported:

2
boards/riscv/esp32c3_luatos_core/esp32c3_luatos_core_usb.yaml
View file

@ -1,7 +1,7 @@
identifier: esp32c3_luatos_core_usb
name: ESP32C3 LuatOS Core USB
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
supported:

2
boards/riscv/gd32vf103c_starter/gd32vf103c_starter.yaml
View file

@ -4,7 +4,7 @@
identifier: gd32vf103c_starter
name: GigaDevice GD32VF103C-STARTER
type: mcu
arch: riscv32
arch: riscv
ram: 32
flash: 128
toolchain:

2
boards/riscv/gd32vf103v_eval/gd32vf103v_eval.yaml
View file

@ -4,7 +4,7 @@
identifier: gd32vf103v_eval
name: GigaDevice GD32VF103V-EVAL
type: mcu
arch: riscv32
arch: riscv
ram: 32
flash: 128
toolchain:

2
boards/riscv/hifive1/hifive1.yaml
View file

@ -1,7 +1,7 @@
identifier: hifive1
name: SiFive HiFive1
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 16

2
boards/riscv/hifive1_revb/hifive1_revb.yaml
View file

@ -1,7 +1,7 @@
identifier: hifive1_revb
name: SiFive HiFive1 Rev B
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 16

2
boards/riscv/hifive_unleashed/hifive_unleashed.yaml
View file

@ -1,7 +1,7 @@
identifier: hifive_unleashed
name: SiFive HiFive Unleashed
type: mcu
arch: riscv64
arch: riscv
toolchain:
- zephyr
ram: 3840

2
boards/riscv/hifive_unmatched/hifive_unmatched.yaml
View file

@ -1,7 +1,7 @@
identifier: hifive_unmatched
name: SiFive HiFive Unmatched
type: mcu
arch: riscv64
arch: riscv
toolchain:
- zephyr
ram: 3840

2
boards/riscv/icev_wireless/icev_wireless.yaml
View file

@ -1,7 +1,7 @@
identifier: icev_wireless
name: ICE-V Wireless
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
testing:

2
boards/riscv/it82xx2_evb/it82xx2_evb.yaml
View file

@ -1,7 +1,7 @@
identifier: it82xx2_evb
name: ITE IT82XX2 EVB
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 256

2
boards/riscv/it8xxx2_evb/it8xxx2_evb.yaml
View file

@ -1,7 +1,7 @@
identifier: it8xxx2_evb
name: ITE IT8XXX2 EVB
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 60

2
boards/riscv/litex_vexriscv/litex_vexriscv.yaml
View file

@ -7,7 +7,7 @@
identifier: litex_vexriscv
name: LiteX SoC with VexRiscV softcore CPU
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 262144

2
boards/riscv/longan_nano/longan_nano.yaml
View file

@ -1,7 +1,7 @@
identifier: longan_nano
name: Sipeed Longan Nano
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
- xtools

2
boards/riscv/longan_nano/longan_nano_lite.yaml
View file

@ -1,7 +1,7 @@
identifier: longan_nano_lite
name: Sipeed Longan Nano Lite
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
- xtools

2
boards/riscv/m2gl025_miv/m2gl025_miv.yaml
View file

@ -1,7 +1,7 @@
identifier: m2gl025_miv
name: Microchip M2GL025 with MiV target
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 64

2
boards/riscv/mpfs_icicle/mpfs_icicle.yaml
View file

@ -1,7 +1,7 @@
identifier: mpfs_icicle
name: Microchip PolarFire ICICLE kit
type: mcu
arch: riscv64
arch: riscv
toolchain:
- zephyr
ram: 3840

2
boards/riscv/neorv32/neorv32.yaml
View file

@ -1,7 +1,7 @@
identifier: neorv32
name: NEORV32 Processor (SoC)
type: mcu
arch: riscv32
arch: riscv
toolchain:
- cross-compile
- zephyr

2
boards/riscv/niosv_g/niosv_g.yaml
View file

@ -1,7 +1,7 @@
identifier: niosv_g
name: INTEL FPGA Nios V/g general purpose processor
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 256

2
boards/riscv/niosv_m/niosv_m.yaml
View file

@ -1,7 +1,7 @@
identifier: niosv_m
name: INTEL FPGA niosv_m
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 256

2
boards/riscv/nrf54h20pdk_nrf54h20/nrf54h20pdk_nrf54h20_cpuppr.yaml
View file

@ -4,7 +4,7 @@
identifier: nrf54h20pdk_nrf54h20_cpuppr
name: nRF54H20-PDK-nRF54H20-PPR
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 28

2
boards/riscv/opentitan_earlgrey/opentitan_earlgrey.yaml
View file

@ -1,7 +1,7 @@
identifier: opentitan_earlgrey
name: OpenTitan Earl Grey
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 128

2
boards/riscv/qemu_riscv32/qemu_riscv32.yaml
View file

@ -2,7 +2,7 @@ identifier: qemu_riscv32
name: QEMU Emulation for RISC-V 32-bit
type: qemu
simulation: qemu
arch: riscv32
arch: riscv
toolchain:
- zephyr
- xtools

2
boards/riscv/qemu_riscv32/qemu_riscv32_smp.yaml
View file

@ -2,7 +2,7 @@ identifier: qemu_riscv32_smp
name: QEMU Emulation for RISC-V 32-bit SMP
type: qemu
simulation: qemu
arch: riscv32
arch: riscv
toolchain:
- zephyr
- xtools

2
boards/riscv/qemu_riscv32/qemu_riscv32_xip.yaml
View file

@ -2,7 +2,7 @@ identifier: qemu_riscv32_xip
name: QEMU Emulation for RISC-V 32-bit in XIP mode
type: qemu
simulation: qemu
arch: riscv32
arch: riscv
ram: 16
toolchain:
- zephyr

2
boards/riscv/qemu_riscv32e/qemu_riscv32e.yaml
View file

@ -2,7 +2,7 @@ identifier: qemu_riscv32e
name: QEMU Emulation for RISC-V (RV32E) 32-bit
type: qemu
simulation: qemu
arch: riscv32
arch: riscv
toolchain:
- zephyr
- xtools

2
boards/riscv/qemu_riscv64/qemu_riscv64.yaml
View file

@ -2,7 +2,7 @@ identifier: qemu_riscv64
name: QEMU Emulation for RISC-V 64-bit
type: qemu
simulation: qemu
arch: riscv64
arch: riscv
toolchain:
- zephyr
supported:

2
boards/riscv/qemu_riscv64/qemu_riscv64_smp.yaml
View file

@ -2,7 +2,7 @@ identifier: qemu_riscv64_smp
name: QEMU Emulation for RISC-V 64-bit SMP
type: qemu
simulation: qemu
arch: riscv64
arch: riscv
toolchain:
- zephyr
supported:

2
boards/riscv/riscv32_virtual/riscv32_virtual.yaml
View file

@ -1,7 +1,7 @@
identifier: riscv32_virtual
name: Renode RISC-V 32-bit Virtual Board
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 4096

2
boards/riscv/rv32m1_vega/rv32m1_vega_ri5cy.yaml
View file

@ -1,7 +1,7 @@
identifier: rv32m1_vega_ri5cy
name: RV32M1-VEGA (RI5CY)
type: mcu
arch: riscv32
arch: riscv
toolchain:
- cross-compile
- zephyr

2
boards/riscv/rv32m1_vega/rv32m1_vega_zero_riscy.yaml
View file

@ -1,7 +1,7 @@
identifier: rv32m1_vega_zero_riscy
name: RV32M1-VEGA (ZERO-RISCY)
type: mcu
arch: riscv32
arch: riscv
toolchain:
- cross-compile
- zephyr

2
boards/riscv/sparkfun_red_v_things_plus/sparkfun_red_v_things_plus.yaml
View file

@ -1,7 +1,7 @@
identifier: sparkfun_red_v_things_plus
name: SparkFun RED-V Things Plus
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 16

2
boards/riscv/stamp_c3/stamp_c3.yaml
View file

@ -1,7 +1,7 @@
identifier: stamp_c3
name: M5Stack STAMP-C3
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
supported:

2
boards/riscv/titanium_ti60_f225/titanium_ti60_f225.yaml
View file

@ -1,7 +1,7 @@
identifier: titanium_ti60_f225
name: titanium_ti60_f225 FPGA development kit with Efinix Sapphire riscv SoC
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
ram: 196608

2
boards/riscv/tlsr9518adk80d/tlsr9518adk80d.yaml
View file

@ -1,7 +1,7 @@
identifier: tlsr9518adk80d
name: Telink TLSR9518ADK80D
type: mcu
arch: riscv32
arch: riscv
toolchain:
- cross-compile
- zephyr

2
boards/riscv/xiao_esp32c3/xiao_esp32c3.yaml
View file

@ -1,7 +1,7 @@
identifier: xiao_esp32c3
name: XIAO ESP32C3
type: mcu
arch: riscv32
arch: riscv
toolchain:
- zephyr
supported:

4
samples/userspace/syscall_perf/sample.yaml
View file

@ -11,8 +11,6 @@ common:
tests:
sample.syscall_performances:
filter: CONFIG_ARCH_HAS_USERSPACE
arch_allow:
- riscv32
- riscv64
arch_allow: riscv
integration_platforms:
- hifive1_revb

3
tests/arch/common/ramfunc/testcase.yaml
View file

@ -6,7 +6,6 @@ tests:
- userspace
arch_allow:
- arm
- riscv32
- riscv64
- riscv
extra_configs:
- CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE=0

3
tests/arch/common/semihost/testcase.yaml
View file

@ -3,7 +3,6 @@ tests:
arch_allow:
- arm
- arm64
- riscv32
- riscv64
- riscv
platform_type:
- qemu

4
tests/arch/riscv/fpu_sharing/testcase.yaml
View file

@ -1,6 +1,4 @@
tests:
arch.riscv.fpu_sharing:
arch_allow:
- riscv32
- riscv64
arch_allow: riscv
filter: CONFIG_CPU_HAS_FPU

3
tests/drivers/console/hello_world/testcase.yaml
View file

@ -23,8 +23,7 @@ tests:
arch_allow:
- arm
- arm64
- riscv32
- riscv64
- riscv
platform_type:
- qemu
extra_args: CONF_FILE=prj_semihost.conf

8
tests/kernel/fpu_sharing/generic/testcase.yaml
View file

@ -30,8 +30,8 @@ tests:
timeout: 600
kernel.fpu_sharing.generic.riscv32:
extra_args: PI_NUM_ITERATIONS=500
filter: CONFIG_CPU_HAS_FPU
arch_allow: riscv32
filter: CONFIG_CPU_HAS_FPU and not CONFIG_64BIT
arch_allow: riscv
tags:
- fpu
- kernel
@ -41,8 +41,8 @@ tests:
extra_args: PI_NUM_ITERATIONS=500
extra_configs:
- CONFIG_MAIN_STACK_SIZE=2048
filter: CONFIG_CPU_HAS_FPU
arch_allow: riscv64
filter: CONFIG_CPU_HAS_FPU and CONFIG_64BIT
arch_allow: riscv
tags:
- fpu
- kernel

8
tests/kernel/gen_isr_table/testcase.yaml
View file

@ -68,9 +68,7 @@ tests:
- CONFIG_ARC_FIRQ_STACK=y
- CONFIG_TEST_HW_STACK_PROTECTION=n
arch.interrupt.gen_isr_table.riscv_direct:
arch_allow:
- riscv32
- riscv64
arch_allow: riscv
platform_exclude:
- m2gl025_miv
- adp_xc7k_ae350
@ -79,9 +77,7 @@ tests:
- CONFIG_GEN_IRQ_VECTOR_TABLE=y
arch.interrupt.gen_isr_table.riscv_no_direct:
platform_exclude: m2gl025_miv
arch_allow:
- riscv32
- riscv64
arch_allow: riscv
filter: CONFIG_RISCV_PRIVILEGED
extra_configs:
- CONFIG_GEN_IRQ_VECTOR_TABLE=n