diff --git a/boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi b/boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi index 749b794667..e83b9eeffe 100644 --- a/boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi +++ b/boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi @@ -6,6 +6,19 @@ #include &pinctrl { + afec0_default: afec0_default { + group1 { + pinmux = , + ; + }; + }; + afec1_default: afec1_default { + group1 { + pinmux = , + ; + }; + }; + gmac_mii: gmac_mii { group1 { pinmux = , diff --git a/boards/arm/sam4e_xpro/sam4e_xpro.dts b/boards/arm/sam4e_xpro/sam4e_xpro.dts index c42b1934af..24bcfc7f4a 100644 --- a/boards/arm/sam4e_xpro/sam4e_xpro.dts +++ b/boards/arm/sam4e_xpro/sam4e_xpro.dts @@ -126,6 +126,20 @@ clock-frequency = <120000000>; }; +&afec0 { + status = "okay"; + + pinctrl-0 = <&afec0_default>; + pinctrl-names = "default"; +}; + +&afec1 { + status = "okay"; + + pinctrl-0 = <&afec1_default>; + pinctrl-names = "default"; +}; + &twi0 { status = "okay"; diff --git a/drivers/adc/adc_sam_afec.c b/drivers/adc/adc_sam_afec.c index dce5044544..167122d845 100644 --- a/drivers/adc/adc_sam_afec.c +++ b/drivers/adc/adc_sam_afec.c @@ -1,6 +1,7 @@ /* * Copyright (c) 2017 comsuisse AG * Copyright (c) 2018 Justin Watson + * Copyright (c) 2023 Gerson Fernando Budke * * SPDX-License-Identifier: Apache-2.0 */ @@ -33,8 +34,10 @@ LOG_MODULE_REGISTER(adc_sam_afec); #define NUM_CHANNELS 12 - #define CONF_ADC_PRESCALER ((SOC_ATMEL_SAM_MCK_FREQ_HZ / 15000000) - 1) +#ifndef AFEC_MR_ONE +#define AFEC_MR_ONE AFEC_MR_ANACH +#endif typedef void (*cfg_func_t)(const struct device *dev); @@ -106,11 +109,13 @@ static int adc_sam_channel_setup(const struct device *dev, return -EINVAL; } +#ifdef AFEC_11147 /* Set single ended channels to unsigned and differential channels * to signed conversions. */ afec->AFEC_EMR &= ~(AFEC_EMR_SIGNMODE( AFEC_EMR_SIGNMODE_SE_UNSG_DF_SIGN_Val)); +#endif return 0; } @@ -284,9 +289,12 @@ static int adc_sam_init(const struct device *dev) } /* Enable PGA and Current Bias. */ - afec->AFEC_ACR = AFEC_ACR_PGA0EN + afec->AFEC_ACR = AFEC_ACR_IBCTL(1) +#ifdef AFEC_11147 + | AFEC_ACR_PGA0EN | AFEC_ACR_PGA1EN - | AFEC_ACR_IBCTL(1); +#endif + ; /* Enable AFEC clock in PMC */ (void)clock_control_on(SAM_DT_PMC_CONTROLLER, diff --git a/dts/arm/atmel/sam4e.dtsi b/dts/arm/atmel/sam4e.dtsi index 38f8f3f182..98e8fe583e 100644 --- a/dts/arm/atmel/sam4e.dtsi +++ b/dts/arm/atmel/sam4e.dtsi @@ -50,6 +50,24 @@ compatible = "mmio-sram"; }; + afec0: adc@400b0000 { + compatible = "atmel,sam-afec"; + reg = <0x400b0000 0x4000>; + interrupts = <30 0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; + status = "disabled"; + #io-channel-cells = <1>; + }; + + afec1: adc@400b4000 { + compatible = "atmel,sam-afec"; + reg = <0x400b4000 0x4000>; + interrupts = <31 0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; + status = "disabled"; + #io-channel-cells = <1>; + }; + eefc: flash-controller@400e0a00 { compatible = "atmel,sam-flash-controller"; reg = <0x400e0a00 0x200>; diff --git a/samples/drivers/adc/boards/sam4e_xpro.overlay b/samples/drivers/adc/boards/sam4e_xpro.overlay new file mode 100644 index 0000000000..f83fec237c --- /dev/null +++ b/samples/drivers/adc/boards/sam4e_xpro.overlay @@ -0,0 +1,35 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2023, Gerson Fernando Budke + */ + +#include + +/ { + zephyr,user { + /* adjust channel number according to pinmux in board.dts */ + io-channels = <&afec0 0>, <&afec0 6>; + }; +}; + +&afec0 { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@6 { + reg = <6>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +};