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dts: infineon: Update psoc6_02 cpu, flash, sram node declarations

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Move CPU, Flash and SRAM node declarations to parent to avoid
duplicate declarations

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
This commit is contained in:
Sreeram Tatapudi 2023-05-18 12:39:37 -07:00 committed by Carles Cufí
parent 4cdf8f751d
commit 6a07b4c552
2 changed files with 41 additions and 44 deletions
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44
dts/arm/infineon/psoc6/mpns/CY8C624ABZI_S2D44.dtsi
View file

@ -8,50 +8,6 @@
#include <arm/armv7-m.dtsi>
#include "../psoc6_02/psoc6_02.124-bga.dtsi"
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m0+";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-m4f";
reg = <1>;
};
};
flash-controller@40240000 {
compatible = "infineon,cat1-flash-controller";
reg = < 0x40240000 0x10000 >;
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@10000000 {
compatible = "soc-nv-flash";
reg = <0x10000000 0x200000>;
write-block-size = <512>;
erase-block-size = <512>;
};
flash1: flash@14000000 {
compatible = "soc-nv-flash";
reg = <0x14000000 0x8000>;
write-block-size = <512>;
erase-block-size = <512>;
};
};
sram0: memory@8000000 {
compatible = "mmio-sram";
reg = <0x8000000 0x100000>;
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};

41
dts/arm/infineon/psoc6/psoc6_02/psoc6_02.dtsi
View file

@ -8,6 +8,47 @@
#include <mem.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m0+";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-m4f";
reg = <1>;
};
};
flash-controller@40240000 {
compatible = "infineon,cat1-flash-controller";
reg = < 0x40240000 0x10000 >;
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@10000000 {
compatible = "soc-nv-flash";
reg = <0x10000000 0x200000>;
write-block-size = <512>;
erase-block-size = <512>;
};
flash1: flash@14000000 {
compatible = "soc-nv-flash";
reg = <0x14000000 0x8000>;
write-block-size = <512>;
erase-block-size = <512>;
};
};
sram0: memory@8000000 {
compatible = "mmio-sram";
reg = <0x8000000 0x100000>;
};
soc {
pinctrl: pinctrl@40300000 {
compatible = "infineon,cat1-pinctrl";