patrick/zephyr
1
0
Fork 0
Code Issues Pull requests Actions 8 Packages Projects Releases Wiki Activity

boards/riscv: Add qemu_riscv32_smp and qemu_riscv64_smp

Browse source 
Based on qemu_riscv32 and qemu_riscv64, add minimal SMP support
using the "virt" machine.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
This commit is contained in:
Ederson de Souza 2022-01-11 15:38:14 -08:00 committed by Anas Nashif
parent ab17f69a72
commit 6babbd32e1
12 changed files with 126 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
boards/riscv/qemu_riscv32/Kconfig.board
View file

@ -6,6 +6,12 @@ config BOARD_QEMU_RISCV32
select QEMU_TARGET
select CPU_HAS_FPU
config BOARD_QEMU_RISCV32_SMP
bool "QEMU RISCV32 SMP target"
depends on SOC_RISCV_VIRT
select QEMU_TARGET
select CPU_HAS_FPU
config BOARD_QEMU_RISCV32_XIP
bool "QEMU RISCV32 XIP target"
depends on SOC_RISCV_SIFIVE_FREEDOM

1
boards/riscv/qemu_riscv32/Kconfig.defconfig
View file

@ -6,6 +6,7 @@ config BUILD_OUTPUT_BIN
config BOARD
default "qemu_riscv32" if BOARD_QEMU_RISCV32
default "qemu_riscv32_xip" if BOARD_QEMU_RISCV32_XIP
default "qemu_riscv32_smp" if BOARD_QEMU_RISCV32_SMP
config COMPRESSED_ISA
default y

2
boards/riscv/qemu_riscv32/board.cmake
View file

@ -5,7 +5,7 @@ set(SUPPORTED_EMU_PLATFORMS qemu)
set(QEMU_binary_suffix riscv32)
set(QEMU_CPU_TYPE_${ARCH} riscv32)
if(CONFIG_BOARD_QEMU_RISCV32)
if(CONFIG_BOARD_QEMU_RISCV32 OR CONFIG_BOARD_QEMU_RISCV32_SMP)
set(QEMU_FLAGS_${ARCH}
-nographic
-machine virt

21
boards/riscv/qemu_riscv32/qemu_riscv32_smp.dts Normal file
View file

@ -0,0 +1,21 @@
/*
* Copyright (c) 2022 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <virt.dtsi>
/ {
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &ram0;
};
};
&uart0 {
status = "okay";
};

15
boards/riscv/qemu_riscv32/qemu_riscv32_smp.yaml Normal file
View file

@ -0,0 +1,15 @@
identifier: qemu_riscv32_smp
name: QEMU Emulation for RISC-V 32-bit SMP
type: qemu
simulation: qemu
arch: riscv32
toolchain:
- zephyr
- xtools
supported:
- netif
testing:
default: true
ignore_tags:
- net
- bluetooth

18
boards/riscv/qemu_riscv32/qemu_riscv32_smp_defconfig Normal file
View file

@ -0,0 +1,18 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_SERIES_RISCV_VIRT=y
CONFIG_SOC_RISCV_VIRT=y
CONFIG_BOARD_QEMU_RISCV32_SMP=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_PLIC=y
CONFIG_RISCV_MACHINE_TIMER=y
CONFIG_STACK_SENTINEL=y
CONFIG_XIP=n
CONFIG_SMP=y
CONFIG_MP_NUM_CPUS=2
CONFIG_QEMU_ICOUNT=n
CONFIG_IDLE_STACK_SIZE=1024

7
boards/riscv/qemu_riscv64/Kconfig.board
View file

@ -7,3 +7,10 @@ config BOARD_QEMU_RISCV64
select QEMU_TARGET
select 64BIT
select CPU_HAS_FPU_DOUBLE_PRECISION
config BOARD_QEMU_RISCV64_SMP
bool "QEMU RISCV64 SMP target"
depends on SOC_RISCV_VIRT
select QEMU_TARGET
select 64BIT
select CPU_HAS_FPU_DOUBLE_PRECISION

7
boards/riscv/qemu_riscv64/Kconfig.defconfig
View file

@ -1,12 +1,9 @@
# Copyright (c) 2019 BayLibre SAS
# SPDX-License-Identifier: Apache-2.0
if BOARD_QEMU_RISCV64
config BUILD_OUTPUT_BIN
default n
config BOARD
default "qemu_riscv64"
endif
default "qemu_riscv64" if BOARD_QEMU_RISCV64
default "qemu_riscv64_smp" if BOARD_QEMU_RISCV64_SMP

21
boards/riscv/qemu_riscv64/qemu_riscv64_smp.dts Normal file
View file

@ -0,0 +1,21 @@
/*
* Copyright (c) 2022 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <virt.dtsi>
/ {
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &ram0;
};
};
&uart0 {
status = "okay";
};

14
boards/riscv/qemu_riscv64/qemu_riscv64_smp.yaml Normal file
View file

@ -0,0 +1,14 @@
identifier: qemu_riscv64_smp
name: QEMU Emulation for RISC-V 64-bit SMP
type: qemu
simulation: qemu
arch: riscv64
toolchain:
- zephyr
supported:
- netif
testing:
default: true
ignore_tags:
- net
- bluetooth

18
boards/riscv/qemu_riscv64/qemu_riscv64_smp_defconfig Normal file
View file

@ -0,0 +1,18 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_SERIES_RISCV_VIRT=y
CONFIG_SOC_RISCV_VIRT=y
CONFIG_BOARD_QEMU_RISCV64=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_PLIC=y
CONFIG_RISCV_MACHINE_TIMER=y
CONFIG_STACK_SENTINEL=y
CONFIG_XIP=n
CONFIG_SMP=y
CONFIG_MP_NUM_CPUS=2
CONFIG_QEMU_ICOUNT=n
CONFIG_IDLE_STACK_SIZE=1024

4
tests/lib/cbprintf_package/testcase.yaml
View file

@ -32,7 +32,7 @@ tests:
libraries.cbprintf_package_long_double:
filter: CONFIG_CPU_HAS_FPU
platform_exclude: qemu_riscv32
platform_exclude: qemu_riscv32 qemu_riscv32_smp
extra_configs:
- CONFIG_CBPRINTF_FP_SUPPORT=y
- CONFIG_CBPRINTF_COMPLETE=y
@ -41,7 +41,7 @@ tests:
libraries.cbprintf_package_long_double_align_offset:
filter: CONFIG_CPU_HAS_FPU
platform_exclude: qemu_riscv32
platform_exclude: qemu_riscv32 qemu_riscv32_smp
extra_configs:
- CONFIG_CBPRINTF_FP_SUPPORT=y
- CONFIG_CBPRINTF_COMPLETE=y