docs: rename intel,pcie compatible id to pcie-controller

rename intel,pcie compatible id referance to pcie-controller in
header file comments and rst files

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
This commit is contained in:
Najumon B.A 2023-11-17 08:20:07 +05:30 committed by Carles Cufí
parent 359e5839fe
commit 6e7f50d7aa
2 changed files with 7 additions and 12 deletions

View file

@ -43,11 +43,6 @@ Any board exposing an NVMe disk should provide a DTS overlay to enable its use w
#include <zephyr/dt-bindings/pcie/pcie.h>
/ {
pcie0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "intel,pcie";
ranges;
nvme0: nvme0 {
compatible = "nvme-controller";
vendor-id = <VENDOR_ID>;

View file

@ -1612,7 +1612,7 @@
*
* @code{.dts}
* pcie0: pcie@0 {
* compatible = "intel,pcie";
* compatible = "pcie-controller";
* reg = <0 1>;
* #address-cells = <3>;
* #size-cells = <2>;
@ -1657,7 +1657,7 @@
*
* @code{.dts}
* pcie0: pcie@0 {
* compatible = "intel,pcie";
* compatible = "pcie-controller";
* reg = <0 1>;
* #address-cells = <3>;
* #size-cells = <2>;
@ -1711,7 +1711,7 @@
* #address-cells = <2>;
*
* pcie0: pcie@0 {
* compatible = "intel,pcie";
* compatible = "pcie-controller";
* reg = <0 0 1>;
* #address-cells = <3>;
* #size-cells = <2>;
@ -1764,7 +1764,7 @@
* #address-cells = <2>;
*
* pcie0: pcie@0 {
* compatible = "intel,pcie";
* compatible = "pcie-controller";
* reg = <0 0 1>;
* #address-cells = <3>;
* #size-cells = <2>;
@ -1804,7 +1804,7 @@
* #address-cells = <2>;
*
* pcie0: pcie@0 {
* compatible = "intel,pcie";
* compatible = "pcie-controller";
* reg = <0 0 1>;
* #address-cells = <3>;
* #size-cells = <2>;
@ -1853,7 +1853,7 @@
* #address-cells = <2>;
*
* pcie0: pcie@0 {
* compatible = "intel,pcie";
* compatible = "pcie-controller";
* reg = <0 0 1>;
* #address-cells = <3>;
* #size-cells = <2>;
@ -1902,7 +1902,7 @@
* #address-cells = <2>;
*
* pcie0: pcie@0 {
* compatible = "intel,pcie";
* compatible = "pcie-controller";
* reg = <0 0 1>;
* #address-cells = <3>;
* #size-cells = <2>;