docs: rename intel,pcie compatible id to pcie-controller
rename intel,pcie compatible id referance to pcie-controller in header file comments and rst files Signed-off-by: Najumon B.A <najumon.ba@intel.com>
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@ -43,11 +43,6 @@ Any board exposing an NVMe disk should provide a DTS overlay to enable its use w
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#include <zephyr/dt-bindings/pcie/pcie.h>
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/ {
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pcie0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "intel,pcie";
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ranges;
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nvme0: nvme0 {
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compatible = "nvme-controller";
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vendor-id = <VENDOR_ID>;
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@ -1612,7 +1612,7 @@
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*
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* @code{.dts}
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* pcie0: pcie@0 {
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* compatible = "intel,pcie";
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* compatible = "pcie-controller";
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* reg = <0 1>;
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* #address-cells = <3>;
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* #size-cells = <2>;
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@ -1657,7 +1657,7 @@
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*
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* @code{.dts}
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* pcie0: pcie@0 {
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* compatible = "intel,pcie";
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* compatible = "pcie-controller";
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* reg = <0 1>;
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* #address-cells = <3>;
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* #size-cells = <2>;
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@ -1711,7 +1711,7 @@
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* #address-cells = <2>;
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*
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* pcie0: pcie@0 {
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* compatible = "intel,pcie";
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* compatible = "pcie-controller";
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* reg = <0 0 1>;
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* #address-cells = <3>;
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* #size-cells = <2>;
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@ -1764,7 +1764,7 @@
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* #address-cells = <2>;
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*
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* pcie0: pcie@0 {
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* compatible = "intel,pcie";
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* compatible = "pcie-controller";
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* reg = <0 0 1>;
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* #address-cells = <3>;
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* #size-cells = <2>;
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@ -1804,7 +1804,7 @@
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* #address-cells = <2>;
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*
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* pcie0: pcie@0 {
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* compatible = "intel,pcie";
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* compatible = "pcie-controller";
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* reg = <0 0 1>;
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* #address-cells = <3>;
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* #size-cells = <2>;
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@ -1853,7 +1853,7 @@
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* #address-cells = <2>;
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*
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* pcie0: pcie@0 {
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* compatible = "intel,pcie";
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* compatible = "pcie-controller";
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* reg = <0 0 1>;
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* #address-cells = <3>;
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* #size-cells = <2>;
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@ -1902,7 +1902,7 @@
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* #address-cells = <2>;
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*
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* pcie0: pcie@0 {
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* compatible = "intel,pcie";
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* compatible = "pcie-controller";
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* reg = <0 0 1>;
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* #address-cells = <3>;
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* #size-cells = <2>;
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