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uart: Add support for stm31mp157c_dk2 board

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Add support for stm32mp1 basic UART API with Zephyr.
UART Console and UART shell are also supported.
Async UART API and USART support is to be done.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This commit is contained in:
Yaël Boutreux 2019-04-02 08:55:52 +02:00 committed by Anas Nashif
parent e9b5fe333e
commit 6f225ab690
8 changed files with 250 additions and 5 deletions
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14
boards/arm/stm32mp157c_dk2/Kconfig.defconfig
View file

@ -10,4 +10,18 @@ if BOARD_STM32MP157C_DK2
config BOARD
default "stm32mp157c_dk2"
if UART_CONSOLE
config UART_3
default y
endif # UART_CONSOLE
if SERIAL
config UART_7
default y
endif # SERIAL
endif # BOARD_STM32MP157_Dk2

19
boards/arm/stm32mp157c_dk2/doc/stm32mp157_dk2.rst
View file

@ -170,6 +170,9 @@ features:
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
``boards/arm/stm32mp157c_dk2/stm32mp157c_dk2_defconfig``
@ -182,6 +185,12 @@ STM32MP157C-DK2 Discovery Board schematic is available here:
`STM32MP157C Discovery board schematics`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- USART_3 TX/RX : PB10/PB12 (UART console)
- UART_7 TX/RX : PE8/PE7 (Arduino Serial)
System Clock
------------
@ -191,9 +200,13 @@ Serial Port
-----------
The STM32MP157C-DK2 Discovery board has 8 U(S)ARTs.
The Zephyr console output is assigned by default to the ram console to be dumped
by the Linux Remoteproc Framework on Cortex®-A7 core. The UART 4 can enabled as
Cortex®-M4 console.
The Zephyr console output is assigned by default to the RAM console to be dumped
by the Linux Remoteproc Framework on Cortex®-A7 core. In order to keep the UART7
free for future serial interactions with Arduino shield, the Zephyr UART console
output is USART3 and is disabled by default. UART console can be enable through
board's device tree and stm32mp157c_dk2_defconfig board file (or prj.conf
project files), and will disable existing RAM console output. Default UART
console settings are 115200 8N1.
Programming and Debugging
*************************

25
boards/arm/stm32mp157c_dk2/stm32mp157c_dk2.dts
View file

@ -11,7 +11,32 @@
model = "STMicroelectronics STM32MP157-DK2 board";
compatible = "st,stm32mp157c-dk2", "st,stm32mp15";
chosen {
/*
* By default, Zephyr console and shell are assigned to
* remoteproc. To enable console and shell over UART, uncomment
* following lines and set the correct config in
* stm32mp157c_dk2_defconfig "Serial Port" section in Zephyr
* board documentation.
* zephyr,console = &usart3;
* zephyr,shell-uart = &usart3;
*/
zephyr,flash = &retram;
zephyr,sram = &mcusram;
};
};
arduino_serial: &uart7 {};
&usart3 {
current-speed = <115200>;
pinctrl-0 = <&usart3_pins_a>;
pinctrl-names = "default";
status = "ok";
};
&uart7 {
current-speed = <115200>;
pinctrl-0 = <&uart7_pins_a>;
pinctrl-names = "default";
status = "ok";
};

2
boards/arm/stm32mp157c_dk2/stm32mp157c_dk2.yaml
View file

@ -8,6 +8,7 @@ toolchain:
- xtools
supported:
- gpio
- shell
testing:
ignore_tags:
- cmsis_rtos_v2
@ -17,7 +18,6 @@ testing:
- crypto
- aes
- cmm
- shell
- LED
- nfc
ram: 256

9
boards/arm/stm32mp157c_dk2/stm32mp157c_dk2_defconfig
View file

@ -9,10 +9,17 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=209000000
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# clock configuration
CONFIG_CLOCK_CONTROL=y
#remote proc console
# console (remote proc console by default)
CONFIG_CONSOLE=y
CONFIG_RAM_CONSOLE=y
CONFIG_RAM_CONSOLE_BUFFER_SIZE=1024
# uart console (overrides remote proc console)
CONFIG_UART_CONSOLE=n

63
dts/arm/st/mp1/stm32mp157.dtsi
View file

@ -146,6 +146,69 @@
label = "GPIOK";
};
};
usart2: serial@4000e000 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x4000e000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <38 0>;
status = "disabled";
label = "UART_2";
};
usart3: serial@4000f000 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x4000f000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
interrupts = <39 0>;
status = "disabled";
label = "UART_3";
};
uart4: serial@40010000 {
compatible = "st,stm32-uart";
reg = <0x40010000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00010000>;
interrupts = <52 0>;
status = "disabled";
label = "UART_4";
};
uart5: serial@40011000 {
compatible = "st,stm32-uart";
reg = <0x40011000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00020000>;
interrupts = <53 0>;
status = "disabled";
label = "UART_5";
};
usart6: serial@44003000 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x44003000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>;
interrupts = <71 0>;
status = "disabled";
label = "UART_6";
};
uart7: serial@40018000 {
compatible = "st,stm32-uart";
reg = <0x40018000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
interrupts = <82 0>;
status = "disabled";
label = "UART_7";
};
uart8: serial@40019000 {
compatible = "st,stm32-uart";
reg = <0x40019000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
interrupts = <83 0>;
status = "disabled";
label = "UART_8";
};
};
};

119
soc/arm/st_stm32/stm32mp1/dts_fixup.h
View file

@ -194,4 +194,123 @@
DT_ST_STM32_GPIO_5000C000_CLOCK_BITS
#define DT_GPIO_STM32_GPIOK_CLOCK_BUS \
DT_ST_STM32_GPIO_5000C000_CLOCK_BUS
#define DT_UART_STM32_USART_2_BASE_ADDRESS \
DT_ST_STM32_USART_4000E000_BASE_ADDRESS
#define DT_UART_STM32_USART_2_BAUD_RATE \
DT_ST_STM32_USART_4000E000_CURRENT_SPEED
#define DT_UART_STM32_USART_2_IRQ_PRI \
DT_ST_STM32_USART_4000E000_IRQ_0_PRIORITY
#define DT_UART_STM32_USART_2_NAME \
DT_ST_STM32_USART_4000E000_LABEL
#define DT_USART_2_IRQ \
DT_ST_STM32_USART_4000E000_IRQ_0
#define DT_UART_STM32_USART_2_CLOCK_BITS \
DT_ST_STM32_USART_4000E000_CLOCK_BITS
#define DT_UART_STM32_USART_2_CLOCK_BUS \
DT_ST_STM32_USART_4000E000_CLOCK_BUS
#define DT_UART_STM32_USART_2_HW_FLOW_CONTROL \
DT_ST_STM32_USART_4000E000_HW_FLOW_CONTROL
#define DT_UART_STM32_USART_3_BASE_ADDRESS \
DT_ST_STM32_USART_4000F000_BASE_ADDRESS
#define DT_UART_STM32_USART_3_BAUD_RATE \
DT_ST_STM32_USART_4000F000_CURRENT_SPEED
#define DT_UART_STM32_USART_3_IRQ_PRI \
DT_ST_STM32_USART_4000F000_IRQ_0_PRIORITY
#define DT_UART_STM32_USART_3_NAME \
DT_ST_STM32_USART_4000F000_LABEL
#define DT_USART_3_IRQ \
DT_ST_STM32_USART_4000F000_IRQ_0
#define DT_UART_STM32_USART_3_CLOCK_BITS \
DT_ST_STM32_USART_4000F000_CLOCK_BITS
#define DT_UART_STM32_USART_3_CLOCK_BUS \
DT_ST_STM32_USART_4000F000_CLOCK_BUS
#define DT_UART_STM32_USART_3_HW_FLOW_CONTROL \
DT_ST_STM32_USART_4000F000_HW_FLOW_CONTROL
#define DT_UART_STM32_UART_4_BASE_ADDRESS \
DT_ST_STM32_UART_40010000_BASE_ADDRESS
#define DT_UART_STM32_UART_4_BAUD_RATE \
DT_ST_STM32_UART_40010000_CURRENT_SPEED
#define DT_UART_STM32_UART_4_IRQ_PRI \
DT_ST_STM32_UART_40010000_IRQ_0_PRIORITY
#define DT_UART_STM32_UART_4_NAME \
DT_ST_STM32_UART_40010000_LABEL
#define DT_UART_4_IRQ \
DT_ST_STM32_UART_40010000_IRQ_0
#define DT_UART_STM32_UART_4_CLOCK_BITS \
DT_ST_STM32_UART_40010000_CLOCK_BITS
#define DT_UART_STM32_UART_4_CLOCK_BUS \
DT_ST_STM32_UART_40010000_CLOCK_BUS
#define DT_UART_STM32_UART_4_HW_FLOW_CONTROL \
DT_ST_STM32_UART_40010000_HW_FLOW_CONTROL
#define DT_UART_STM32_UART_5_BASE_ADDRESS \
DT_ST_STM32_UART_40011000_BASE_ADDRESS
#define DT_UART_STM32_UART_5_BAUD_RATE \
DT_ST_STM32_UART_40011000_CURRENT_SPEED
#define DT_UART_STM32_UART_5_IRQ_PRI \
DT_ST_STM32_UART_40011000_IRQ_0_PRIORITY
#define DT_UART_STM32_UART_5_NAME \
DT_ST_STM32_UART_40011000_LABEL
#define DT_UART_5_IRQ \
DT_ST_STM32_UART_40011000_IRQ_0
#define DT_UART_STM32_UART_5_CLOCK_BITS \
DT_ST_STM32_UART_40011000_CLOCK_BITS
#define DT_UART_STM32_UART_5_CLOCK_BUS \
DT_ST_STM32_UART_40011000_CLOCK_BUS
#define DT_UART_STM32_UART_5_HW_FLOW_CONTROL \
DT_ST_STM32_UART_40011000_HW_FLOW_CONTROL
#define DT_UART_STM32_USART_6_BASE_ADDRESS \
DT_ST_STM32_USART_44003000_BASE_ADDRESS
#define DT_UART_STM32_USART_6_BAUD_RATE \
DT_ST_STM32_USART_44003000_CURRENT_SPEED
#define DT_UART_STM32_USART_6_IRQ_PRI \
DT_ST_STM32_USART_44003000_IRQ_0_PRIORITY
#define DT_UART_STM32_USART_6_NAME \
DT_ST_STM32_USART_44003000_LABEL
#define DT_USART_6_IRQ \
DT_ST_STM32_USART_44003000_IRQ_0
#define DT_UART_STM32_USART_6_CLOCK_BITS \
DT_ST_STM32_USART_44003000_CLOCK_BITS
#define DT_UART_STM32_USART_6_CLOCK_BUS \
DT_ST_STM32_USART_44003000_CLOCK_BUS
#define DT_UART_STM32_USART_6_HW_FLOW_CONTROL \
DT_ST_STM32_USART_40003000_HW_FLOW_CONTROL
#define DT_UART_STM32_UART_7_BASE_ADDRESS \
DT_ST_STM32_UART_40018000_BASE_ADDRESS
#define DT_UART_STM32_UART_7_BAUD_RATE \
DT_ST_STM32_UART_40018000_CURRENT_SPEED
#define DT_UART_STM32_UART_7_IRQ_PRI \
DT_ST_STM32_UART_40018000_IRQ_0_PRIORITY
#define DT_UART_STM32_UART_7_NAME \
DT_ST_STM32_UART_40018000_LABEL
#define DT_UART_7_IRQ \
DT_ST_STM32_UART_40018000_IRQ_0
#define DT_UART_STM32_UART_7_CLOCK_BITS \
DT_ST_STM32_UART_40018000_CLOCK_BITS
#define DT_UART_STM32_UART_7_CLOCK_BUS \
DT_ST_STM32_UART_40018000_CLOCK_BUS
#define DT_UART_STM32_UART_7_HW_FLOW_CONTROL \
DT_ST_STM32_UART_40018000_HW_FLOW_CONTROL
#define DT_UART_STM32_UART_8_BASE_ADDRESS \
DT_ST_STM32_UART_40019000_BASE_ADDRESS
#define DT_UART_STM32_UART_8_BAUD_RATE \
DT_ST_STM32_UART_40019000_CURRENT_SPEED
#define DT_UART_STM32_UART_8_IRQ_PRI \
DT_ST_STM32_UART_40019000_IRQ_0_PRIORITY
#define DT_UART_STM32_UART_8_NAME \
DT_ST_STM32_UART_40019000_LABEL
#define DT_UART_8_IRQ \
DT_ST_STM32_UART_40019000_IRQ_0
#define DT_UART_STM32_UART_8_CLOCK_BITS \
DT_ST_STM32_UART_40019000_CLOCK_BITS
#define DT_UART_STM32_UART_8_CLOCK_BUS \
DT_ST_STM32_UART_40019000_CLOCK_BUS
#define DT_UART_STM32_UART_8_HW_FLOW_CONTROL \
DT_ST_STM32_UART_40019000_HW_FLOW_CONTROL
/* End of SoC Level DTS fixup file */

4
soc/arm/st_stm32/stm32mp1/soc.h
View file

@ -42,6 +42,10 @@
#include <stm32mp1xx_ll_system.h>
#endif
#ifdef CONFIG_SERIAL_HAS_DRIVER
#include <stm32mp1xx_ll_usart.h>
#endif
#endif /* !_ASMLANGUAGE */
#endif /* _STM32MP1SOC_H_ */