drivers: clock_control: stm32h5: Set HSI divider
By default HSIDIV is set to 0x01, so default frequency is 32 MHz. This register should be always set based on dts value. Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
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@ -20,6 +20,9 @@
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#include <zephyr/drivers/clock_control/stm32_clock_control.h>
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/* Macros to fill up prescaler values */
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#define z_hsi_divider(v) LL_RCC_HSI_DIV_ ## v
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#define hsi_divider(v) z_hsi_divider(v)
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#define z_ahb_prescaler(v) LL_RCC_SYSCLK_DIV_ ## v
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#define ahb_prescaler(v) z_ahb_prescaler(v)
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@ -618,6 +621,8 @@ static void set_up_fixed_clock_sources(void)
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/* Wait for HSI ready */
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}
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}
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/* HSI divider configuration */
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LL_RCC_HSI_SetDivider(hsi_divider(STM32_HSI_DIVISOR));
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}
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if (IS_ENABLED(STM32_LSE_ENABLED)) {
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