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serial/ns16550: refactor (again) to conform to driver model

Browse source 
() Renames ns16550.c to uart_ns16550.c. This is to follow
   the driver naming convention.
() Renames functions ns16550_uart_*() to uart_ns16550_*(),
   following driver naming convention.
() UART ports initialization is moved into the driver itself.
   All the init code in platform config files is removed.
() Adds (many) Kconfig options. These don't have to be defined
   in each platform's board.h anymore.
() Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_*
() Disable NS16550 for ARC as no port is defined anyway.

Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2015-12-01 08:42:19 -08:00 committed by Anas Nashif
parent 846f5f4272
commit 728d91d598
36 changed files with 838 additions and 936 deletions
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2
arch/arc/defconfig
View file

@ -5,7 +5,5 @@ CONFIG_CPU_ARCEM4=y
CONFIG_CPU_ARCV2=y
CONFIG_RAM_START=0xa8000000
CONFIG_RAM_SIZE=0x14000
CONFIG_SERIAL=y
CONFIG_NS16550=y
CONFIG_ARCV2_INTERRUPT_UNIT=y
CONFIG_ARCV2_TIMER=y

2
arch/arc/platforms/generic_arc/board.h
View file

@ -141,8 +141,6 @@
#define CONFIG_UART_CONSOLE_IRQ IRQ_UART0_INTR
#define CONFIG_UART_CONSOLE_INT_PRI 0
#define UART_REG_ADDR_INTERVAL 4 /* for ns16550 driver */
#endif /* !_ASMLANGUAGE */
#endif /* _BOARD__H_ */

2
arch/x86/defconfig
View file

@ -10,7 +10,7 @@ CONFIG_PIC_DISABLE=y
CONFIG_LOAPIC=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_NS16550=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000

84
arch/x86/platforms/galileo/Kconfig
View file

@ -303,12 +303,88 @@ config SPI_INTEL_PORT_1_CS_GPIO_PIN
default 2
endif # SPI
if NS16550
config NS16550_PORT_0_BASE_ADDR
if UART_NS16550
config UART_NS16550_PCI
def_bool y
config UART_NS16550_PORT_0
def_bool y
if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0x9000f000
config NS16550_PORT_1_BASE_ADDR
config UART_NS16550_PORT_0_IRQ
default 0
config UART_NS16550_PORT_0_IRQ_PRI
default 0
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 44236800
config UART_NS16550_PORT_0_OPTIONS
default 0
config UART_NS16550_PORT_0_PCI
def_bool y if UART_NS16550_PCI
config UART_NS16550_PORT_0_PCI_CLASS
default 0x07
config UART_NS16550_PORT_0_PCI_BUS
default 0
config UART_NS16550_PORT_0_PCI_DEV
default 20
config UART_NS16550_PORT_0_PCI_VENDOR_ID
default 0x8086
config UART_NS16550_PORT_0_PCI_DEVICE_ID
default 0x0936
config UART_NS16550_PORT_0_PCI_FUNC
default 1
config UART_NS16550_PORT_0_PCI_BAR
default 0
endif # UART_NS16550_PORT_0
config UART_NS16550_PORT_1
def_bool y
if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0x9000b000
endif
config UART_NS16550_PORT_1_IRQ
default 17
config UART_NS16550_PORT_1_IRQ_PRI
default 3
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 44236800
config UART_NS16550_PORT_1_OPTIONS
default 0
config UART_NS16550_PORT_1_PCI
def_bool y if UART_NS16550_PCI
config UART_NS16550_PORT_1_PCI_CLASS
default 0x07
config UART_NS16550_PORT_1_PCI_BUS
default 0
config UART_NS16550_PORT_1_PCI_DEV
default 20
config UART_NS16550_PORT_1_PCI_VENDOR_ID
default 0x8086
config UART_NS16550_PORT_1_PCI_DEVICE_ID
default 0x0936
config UART_NS16550_PORT_1_PCI_FUNC
default 5
config UART_NS16550_PORT_1_PCI_BAR
default 0
endif # UART_NS16550_PORT_1
endif # UART_NS16550
if ADC
config ADC_TI_ADC108S102

1
arch/x86/platforms/galileo/Makefile
View file

@ -3,7 +3,6 @@ ccflags-y += -I$(srctree)/drivers
asflags-y := ${ccflags-y}
obj-y += galileo_config.o
obj-y += galileo.o
obj-$(CONFIG_PINMUX) += galileo_pinmux.o
obj-$(CONFIG_REBOOT) += galileo_reboot.o

34
arch/x86/platforms/galileo/board.h
View file

@ -54,39 +54,15 @@
#define NUM_STD_IRQS 16 /* number of "standard" IRQs on an x86 platform */
#define INT_VEC_IRQ0 0x20 /* Vector number for IRQ0 */
/* serial port (aka COM port) information */
#define COM1_BAUD_RATE 115200
#define COM2_BAUD_RATE 115200
#define COM2_INT_LVL 0x11 /* COM2 connected to IRQ17 */
#define COM2_INT_PRI 3
#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */
#define UART_XTAL_FREQ (2764800 * 16)
/* uart configuration settings */
/* Generic definitions */
#define CONFIG_UART_PCI_VENDOR_ID 0x8086
#define CONFIG_UART_PCI_DEVICE_ID 0x0936
#define CONFIG_UART_PCI_BUS 0
#define CONFIG_UART_PCI_DEV 20
#define CONFIG_UART_PORT_0_FUNCTION 1
#define CONFIG_UART_PORT_1_FUNCTION 5
#define CONFIG_UART_PCI_BAR 0
#define CONFIG_UART_BAUDRATE COM1_BAUD_RATE
#define CONFIG_UART_PORT_1_IRQ COM2_INT_LVL
#define CONFIG_UART_PORT_1_IRQ_PRIORITY COM2_INT_PRI
/* UART console */
#ifndef _ASMLANGUAGE
extern struct device * const uart_devs[];
#endif
#if defined(CONFIG_UART_CONSOLE)
#define CONFIG_UART_CONSOLE_IRQ COM2_INT_LVL
#define CONFIG_UART_CONSOLE_INT_PRI 3
#define CONFIG_UART_CONSOLE_IRQ CONFIG_UART_NS16550_PORT_1_IRQ
#define CONFIG_UART_CONSOLE_INT_PRI CONFIG_UART_NS16550_PORT_1_IRQ_PRI
#define UART_CONSOLE_DEV (uart_devs[CONFIG_UART_CONSOLE_INDEX])
@ -108,9 +84,9 @@ extern struct device * const uart_devs[];
#if defined(CONFIG_BLUETOOTH_UART)
#define CONFIG_BLUETOOTH_UART_INDEX 1
#define CONFIG_BLUETOOTH_UART_IRQ COM2_INT_LVL
#define CONFIG_BLUETOOTH_UART_IRQ CONFIG_UART_NS16550_PORT_1_IRQ
#define CONFIG_BLUETOOTH_UART_INT_PRI 3
#define CONFIG_BLUETOOTH_UART_FREQ UART_XTAL_FREQ
#define CONFIG_BLUETOOTH_UART_FREQ CONFIG_UART_NS16550_PORT_1_CLK_FREQ
#define CONFIG_BLUETOOTH_UART_BAUDRATE CONFIG_UART_BAUDRATE
#define BT_UART_DEV (uart_devs[CONFIG_BLUETOOTH_UART_INDEX])

154
arch/x86/platforms/galileo/galileo_config.c
View file

@ -1,154 +0,0 @@
/*
* Copyright (c) 2015 Intel Corporation.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file Contains configuration for galileo platforms.
*/
#include <stdio.h>
#include <stdint.h>
#include <device.h>
#include <init.h>
#include "board.h"
#ifdef CONFIG_NS16550
#include <uart.h>
#include <bluetooth/uart.h>
#include <console/uart_console.h>
#include <serial/ns16550.h>
#if defined(CONFIG_UART_CONSOLE) || defined(CONFIG_BLUETOOTH_UART)
/**
* @brief Initialize NS16550 serial port #1
*
* @param dev The UART device struct
*
* @return DEV_OK if successful, otherwise failed.
*/
static int ns16550_uart_init(struct device *dev)
{
#if defined(CONFIG_UART_CONSOLE)
struct uart_init_info info = {
.baud_rate = CONFIG_UART_CONSOLE_BAUDRATE,
.sys_clk_freq = UART_XTAL_FREQ,
.irq_pri = CONFIG_UART_CONSOLE_INT_PRI
};
if (dev == UART_CONSOLE_DEV) {
uart_init(UART_CONSOLE_DEV, &info);
}
#endif
return DEV_OK;
}
#else
static int ns16550_uart_init(struct device *dev)
{
ARG_UNUSED(dev);
return DEV_OK;
}
#endif /* CONFIG_UART_CONSOLE || CONFIG_BLUETOOTH_UART */
/**
* @brief UART Device configuration.
*
* This contains the device configuration for UART.
*/
struct uart_device_config ns16550_uart_dev_cfg[] = {
{
.port = CONFIG_NS16550_PORT_0_BASE_ADDR,
.port_init = ns16550_uart_port_init,
#if defined(CONFIG_UART_CONSOLE) || defined(CONFIG_BLUETOOTH_UART)
.config_func = ns16550_uart_init,
.irq = CONFIG_UART_CONSOLE_IRQ,
#endif
.pci_dev.class = PCI_CLASS_COMM_CTLR,
.pci_dev.bus = CONFIG_UART_PCI_BUS,
.pci_dev.dev = CONFIG_UART_PCI_DEV,
.pci_dev.vendor_id = CONFIG_UART_PCI_VENDOR_ID,
.pci_dev.device_id = CONFIG_UART_PCI_DEVICE_ID,
.pci_dev.function = CONFIG_UART_PORT_0_FUNCTION,
.pci_dev.bar = CONFIG_UART_PCI_BAR,
},
{
.port = CONFIG_NS16550_PORT_1_BASE_ADDR,
.irq = CONFIG_UART_PORT_1_IRQ,
.irq_pri = CONFIG_UART_PORT_1_IRQ_PRIORITY,
.port_init = ns16550_uart_port_init,
#if defined(CONFIG_UART_CONSOLE) || defined(CONFIG_BLUETOOTH_UART)
.config_func = ns16550_uart_init,
.irq = CONFIG_UART_CONSOLE_IRQ,
#endif
.pci_dev.class = PCI_CLASS_COMM_CTLR,
.pci_dev.bus = CONFIG_UART_PCI_BUS,
.pci_dev.dev = CONFIG_UART_PCI_DEV,
.pci_dev.vendor_id = CONFIG_UART_PCI_VENDOR_ID,
.pci_dev.device_id = CONFIG_UART_PCI_DEVICE_ID,
.pci_dev.function = CONFIG_UART_PORT_1_FUNCTION,
.pci_dev.bar = CONFIG_UART_PCI_BAR,
},
/* Add pre-configured ports after this. */
};
/**< Device data */
static struct uart_ns16550_dev_data_t ns16550_uart_dev_data[2];
/* UART 0 */
DECLARE_DEVICE_INIT_CONFIG(ns16550_uart0,
CONFIG_UART_PORT_0_NAME,
&uart_platform_init,
&ns16550_uart_dev_cfg[0]);
#if (defined(CONFIG_EARLY_CONSOLE) && \
defined(CONFIG_UART_CONSOLE) && \
(CONFIG_UART_CONSOLE_INDEX == 0))
SYS_DEFINE_DEVICE(ns16550_uart0, &ns16550_uart_dev_data[0], PRIMARY,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#else
SYS_DEFINE_DEVICE(ns16550_uart0, &ns16550_uart_dev_data[0], SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
#endif /* CONFIG_EARLY_CONSOLE */
/* UART 1 */
DECLARE_DEVICE_INIT_CONFIG(ns16550_uart1,
CONFIG_UART_PORT_1_NAME,
&uart_platform_init,
&ns16550_uart_dev_cfg[1]);
#if (defined(CONFIG_EARLY_CONSOLE) && \
defined(CONFIG_UART_CONSOLE) && \
(CONFIG_UART_CONSOLE_INDEX == 1))
SYS_DEFINE_DEVICE(ns16550_uart1, &ns16550_uart_dev_data[1], PRIMARY,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#else
SYS_DEFINE_DEVICE(ns16550_uart1, &ns16550_uart_dev_data[1], SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
#endif /* CONFIG_EARLY_CONSOLE */
/**< UART Devices */
struct device * const uart_devs[] = {
&__initconfig_ns16550_uart0,
&__initconfig_ns16550_uart1,
};
#endif

51
arch/x86/platforms/ia32/Kconfig
View file

@ -54,4 +54,55 @@ config UART_CONSOLE_PRIORITY
config IPI_CONSOLE_PRIORITY
default 60
if UART_NS16550
config UART_NS16550_PCI
def_bool n
config UART_NS16550_PORT_0
def_bool y
if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0x03F8
config UART_NS16550_PORT_0_IRQ
default 4
config UART_NS16550_PORT_0_IRQ_PRI
default 3
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 1843200
config UART_NS16550_PORT_0_OPTIONS
default 0
endif # UART_NS16550_PORT_0
config UART_NS16550_PORT_1
def_bool y
if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0x02F8
config UART_NS16550_PORT_1_IRQ
default 3
config UART_NS16550_PORT_1_IRQ_PRI
default 3
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 1843200
config UART_NS16550_PORT_1_OPTIONS
default 0
endif # UART_NS16550_PORT_1
endif # UART_NS16550
endif

1
arch/x86/platforms/ia32/Makefile
View file

@ -3,5 +3,4 @@ ccflags-y +=-I$(srctree)/include/drivers
ccflags-y +=-I$(srctree)/drivers
asflags-y := ${ccflags-y}
obj-y += ia32_config.o
obj-y += ia32.o

50
arch/x86/platforms/ia32/board.h
View file

@ -53,42 +53,16 @@
#define INT_VEC_IRQ0 0x20 /* vector number for IRQ0 */
/* serial port (aka COM port) information */
#ifdef CONFIG_NS16550
#define COM1_BASE_ADRS 0x3f8
#define COM1_INT_LVL 0x04 /* COM1 connected to IRQ4 */
#define COM1_INT_VEC (INT_VEC_IRQ0 + COM1_INT_LVL)
#define COM1_INT_PRI 3
#define COM1_BAUD_RATE 115200
#define COM2_BASE_ADRS 0x2f8
#define COM2_INT_LVL 0x03 /* COM2 connected to IRQ3 */
#define COM2_INT_VEC (INT_VEC_IRQ0 + COM2_INT_LVL)
#define COM2_INT_PRI 3
#define COM2_BAUD_RATE 115200
#define UART_REG_ADDR_INTERVAL 1 /* address diff of adjacent regs. */
#define UART_XTAL_FREQ 1843200
/* uart configuration settings */
/* Generic definitions */
#define CONFIG_UART_BAUDRATE COM1_BAUD_RATE
#define CONFIG_UART_PORT_0_REGS COM1_BASE_ADRS
#define CONFIG_UART_PORT_0_IRQ COM1_INT_LVL
#define CONFIG_UART_PORT_0_IRQ_PRIORITY COM1_INT_PRI
#define CONFIG_UART_PORT_1_REGS COM2_BASE_ADRS
#define CONFIG_UART_PORT_1_IRQ COM2_INT_LVL
#define CONFIG_UART_PORT_1_IRQ_PRIORITY COM2_INT_PRI
#ifdef CONFIG_UART_NS16550
/* Pipe UART definitions */
#define CONFIG_UART_PIPE_INDEX 1
#define CONFIG_UART_PIPE_BAUDRATE CONFIG_UART_BAUDRATE
#define CONFIG_UART_PIPE_IRQ COM2_INT_LVL
#define CONFIG_UART_PIPE_INT_PRI COM2_INT_PRI
#define CONFIG_UART_PIPE_FREQ UART_XTAL_FREQ
#define CONFIG_UART_PIPE_BAUDRATE CONFIG_UART_NS16550_PORT_1_BAUD_RATE
#define CONFIG_UART_PIPE_IRQ CONFIG_UART_NS16550_PORT_1_IRQ
#define CONFIG_UART_PIPE_INT_PRI CONFIG_UART_NS16550_PORT_1_IRQ_PRI
#define CONFIG_UART_PIPE_FREQ CONFIG_UART_NS16550_PORT_1_CLK_FREQ
#ifndef _ASMLANGUAGE
extern struct device * const uart_devs[];
@ -97,8 +71,8 @@ extern struct device * const uart_devs[];
/* Console definitions */
#if defined(CONFIG_UART_CONSOLE)
#define CONFIG_UART_CONSOLE_IRQ COM1_INT_LVL
#define CONFIG_UART_CONSOLE_INT_PRI COM1_INT_PRI
#define CONFIG_UART_CONSOLE_IRQ CONFIG_UART_NS16550_PORT_0_IRQ
#define CONFIG_UART_CONSOLE_INT_PRI CONFIG_UART_NS16550_PORT_0_IRQ_PRI
#define UART_CONSOLE_DEV (uart_devs[CONFIG_UART_CONSOLE_INDEX])
@ -108,15 +82,15 @@ extern struct device * const uart_devs[];
#if defined(CONFIG_BLUETOOTH_UART)
#define CONFIG_BLUETOOTH_UART_INDEX 1
#define CONFIG_BLUETOOTH_UART_IRQ COM2_INT_LVL
#define CONFIG_BLUETOOTH_UART_INT_PRI COM2_INT_PRI
#define CONFIG_BLUETOOTH_UART_FREQ UART_XTAL_FREQ
#define CONFIG_BLUETOOTH_UART_BAUDRATE CONFIG_UART_BAUDRATE
#define CONFIG_BLUETOOTH_UART_IRQ CONFIG_UART_NS16550_PORT_1_IRQ
#define CONFIG_BLUETOOTH_UART_INT_PRI CONFIG_UART_NS16550_PORT_1_IRQ_PRI
#define CONFIG_BLUETOOTH_UART_FREQ CONFIG_UART_NS16550_PORT_1_CLK_FREQ
#define CONFIG_BLUETOOTH_UART_BAUDRATE CONFIG_UART_NS16550_PORT_1_BAUD_RATE
#define BT_UART_DEV (uart_devs[CONFIG_BLUETOOTH_UART_INDEX])
#endif /* CONFIG_BLUETOOTH_UART */
#endif /* CONFIG_NS16550 */
#endif /* CONFIG_UART_NS16550 */
#endif /* __INCboardh */

136
arch/x86/platforms/ia32/ia32_config.c
View file

@ -1,136 +0,0 @@
/*
* Copyright (c) 2015 Intel Corporation.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file Contains configuration for ia32 platforms.
*/
#include <stdio.h>
#include <stdint.h>
#include <device.h>
#include <init.h>
#include "board.h"
#ifdef CONFIG_NS16550
#include <uart.h>
#include <bluetooth/uart.h>
#include <console/uart_console.h>
#include <serial/ns16550.h>
#if defined(CONFIG_UART_CONSOLE) || defined(CONFIG_BLUETOOTH_UART)
/**
* @brief Initialize NS16550 serial port as console
*
* @param dev The UART device struct
*
* @return DEV_OK if successful, otherwise failed.
*/
static int ns16550_uart_init(struct device *dev)
{
#if defined(CONFIG_UART_CONSOLE)
struct uart_init_info info = {
.baud_rate = CONFIG_UART_CONSOLE_BAUDRATE,
.sys_clk_freq = UART_XTAL_FREQ,
.irq_pri = CONFIG_UART_CONSOLE_INT_PRI
};
if (dev == UART_CONSOLE_DEV) {
uart_init(UART_CONSOLE_DEV, &info);
}
#endif
return DEV_OK;
}
#else
static int ns16550_uart_init(struct device *dev)
{
ARG_UNUSED(dev);
return DEV_OK;
}
#endif /* CONFIG_UART_CONSOLE || CONFIG_BLUETOOTH_UART */
/**< UART device configuration */
static struct uart_device_config ns16550_uart_dev_cfg[] = {
{
.port = CONFIG_UART_PORT_0_REGS,
.irq = CONFIG_UART_PORT_0_IRQ,
.irq_pri = CONFIG_UART_PORT_0_IRQ_PRIORITY,
.port_init = ns16550_uart_port_init,
#if defined(CONFIG_UART_CONSOLE) || defined(CONFIG_BLUETOOTH_UART)
.config_func = ns16550_uart_init,
#endif
},
{
.port = CONFIG_UART_PORT_1_REGS,
.irq = CONFIG_UART_PORT_1_IRQ,
.irq_pri = CONFIG_UART_PORT_1_IRQ_PRIORITY,
.port_init = ns16550_uart_port_init,
#if defined(CONFIG_UART_CONSOLE) || defined(CONFIG_BLUETOOTH_UART)
.config_func = ns16550_uart_init,
#endif
},
};
/**< UART device data */
static struct uart_ns16550_dev_data_t ns16550_uart_dev_data[2];
/* UART 0 */
DECLARE_DEVICE_INIT_CONFIG(ns16550_uart0,
CONFIG_UART_PORT_0_NAME,
&uart_platform_init,
&ns16550_uart_dev_cfg[0]);
#if (defined(CONFIG_EARLY_CONSOLE) && \
defined(CONFIG_UART_CONSOLE) && \
(CONFIG_UART_CONSOLE_INDEX == 0))
SYS_DEFINE_DEVICE(ns16550_uart0, &ns16550_uart_dev_data[0], PRIMARY,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#else
SYS_DEFINE_DEVICE(ns16550_uart0, &ns16550_uart_dev_data[0], SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
#endif /* CONFIG_EARLY_CONSOLE */
/* UART 1 */
DECLARE_DEVICE_INIT_CONFIG(ns16550_uart1,
CONFIG_UART_PORT_1_NAME,
&uart_platform_init,
&ns16550_uart_dev_cfg[1]);
#if (defined(CONFIG_EARLY_CONSOLE) && \
defined(CONFIG_UART_CONSOLE) && \
(CONFIG_UART_CONSOLE_INDEX == 1))
SYS_DEFINE_DEVICE(ns16550_uart1, &ns16550_uart_dev_data[1], PRIMARY,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#else
SYS_DEFINE_DEVICE(ns16550_uart1, &ns16550_uart_dev_data[1], SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
#endif /* CONFIG_EARLY_CONSOLE */
/**< UART Devices */
struct device * const uart_devs[] = {
&__initconfig_ns16550_uart0,
&__initconfig_ns16550_uart1,
};
#endif

83
arch/x86/platforms/ia32_pci/Kconfig
View file

@ -54,4 +54,87 @@ config KERNEL_INIT_PRIORITY_DEVICE
config UART_CONSOLE_PRIORITY
default 60
if UART_NS16550
config UART_NS16550_PCI
def_bool y
config UART_NS16550_PORT_0
def_bool y
if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0x00000000
config UART_NS16550_PORT_0_IRQ
default 0
config UART_NS16550_PORT_0_IRQ_PRI
default 0
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 44236800
config UART_NS16550_PORT_0_OPTIONS
default 0
config UART_NS16550_PORT_0_PCI
def_bool y if UART_NS16550_PCI
config UART_NS16550_PORT_0_PCI_CLASS
default 0x07
config UART_NS16550_PORT_0_PCI_BUS
default 0
config UART_NS16550_PORT_0_PCI_DEV
default 20
config UART_NS16550_PORT_0_PCI_VENDOR_ID
default 0x8086
config UART_NS16550_PORT_0_PCI_DEVICE_ID
default 0x0936
config UART_NS16550_PORT_0_PCI_FUNC
default 1
config UART_NS16550_PORT_0_PCI_BAR
default 0
endif # UART_NS16550_PORT_0
config UART_NS16550_PORT_1
def_bool y
if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0x00000000
config UART_NS16550_PORT_1_IRQ
default 0
config UART_NS16550_PORT_1_IRQ_PRI
default 0
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 44236800
config UART_NS16550_PORT_1_OPTIONS
default 0
config UART_NS16550_PORT_1_PCI
def_bool y if UART_NS16550_PCI
config UART_NS16550_PORT_1_PCI_CLASS
default 0x07
config UART_NS16550_PORT_1_PCI_BUS
default 0
config UART_NS16550_PORT_1_PCI_DEV
default 20
config UART_NS16550_PORT_1_PCI_VENDOR_ID
default 0x8086
config UART_NS16550_PORT_1_PCI_DEVICE_ID
default 0x0936
config UART_NS16550_PORT_1_PCI_FUNC
default 5
config UART_NS16550_PORT_1_PCI_BAR
default 0
endif # UART_NS16550_PORT_1
endif # UART_NS16550
endif

1
arch/x86/platforms/ia32_pci/Makefile
View file

@ -3,5 +3,4 @@ ccflags-y += -I$(srctree)/drivers
asflags-y := ${ccflags-y}
obj-y += ia32_pci_config.o
obj-y += ia32_pci.o

31
arch/x86/platforms/ia32_pci/board.h
View file

@ -54,35 +54,16 @@
#define NUM_STD_IRQS 16 /* number of "standard" IRQs on an x86 platform */
#define INT_VEC_IRQ0 0x20 /* Vector number for IRQ0 */
/* serial port (aka COM port) information */
#define COM1_BAUD_RATE 115200
#define COM2_BAUD_RATE 115200
#define COM2_INT_LVL 0x11 /* COM2 connected to IRQ17 */
#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */
#define UART_XTAL_FREQ (2764800 * 16)
/* uart configuration settings */
/* Generic definitions */
#define CONFIG_UART_PCI_VENDOR_ID 0x8086
#define CONFIG_UART_PCI_DEVICE_ID 0x0936
#define CONFIG_UART_PCI_BUS 0
#define CONFIG_UART_PCI_DEV 20
#define CONFIG_UART_PORT_0_FUNCTION 1
#define CONFIG_UART_PORT_1_FUNCTION 5
#define CONFIG_UART_PCI_BAR 0
#define CONFIG_UART_BAUDRATE COM1_BAUD_RATE
#ifndef _ASMLANGUAGE
extern struct device * const uart_devs[];
#endif
#if defined(CONFIG_UART_CONSOLE)
#define CONFIG_UART_CONSOLE_IRQ COM2_INT_LVL
#define CONFIG_UART_CONSOLE_INT_PRI 3
#define CONFIG_UART_CONSOLE_IRQ CONFIG_UART_NS16550_PORT_1_IRQ
#define CONFIG_UART_CONSOLE_INT_PRI CONFIG_UART_NS16550_PORT_1_IRQ_PRI
#define UART_CONSOLE_DEV (uart_devs[CONFIG_UART_CONSOLE_INDEX])
@ -104,10 +85,10 @@ extern struct device * const uart_devs[];
#if defined(CONFIG_BLUETOOTH_UART)
#define CONFIG_BLUETOOTH_UART_INDEX 1
#define CONFIG_BLUETOOTH_UART_IRQ COM2_INT_LVL
#define CONFIG_BLUETOOTH_UART_INT_PRI 3
#define CONFIG_BLUETOOTH_UART_FREQ UART_XTAL_FREQ
#define CONFIG_BLUETOOTH_UART_BAUDRATE CONFIG_UART_BAUDRATE
#define CONFIG_BLUETOOTH_UART_IRQ CONFIG_UART_NS16550_PORT_1_IRQ
#define CONFIG_BLUETOOTH_UART_INT_PRI CONFIG_UART_NS16550_PORT_1_IRQ_PRI
#define CONFIG_BLUETOOTH_UART_FREQ CONFIG_UART_NS16550_PORT_1_CLK_FREQ
#define CONFIG_BLUETOOTH_UART_BAUDRATE CONFIG_UART_NS16550_PORT_1_BAUD_RATE
#define BT_UART_DEV (uart_devs[CONFIG_BLUETOOTH_UART_INDEX])
#endif /* CONFIG_BLUETOOTH_UART */

149
arch/x86/platforms/ia32_pci/ia32_pci_config.c
View file

@ -1,149 +0,0 @@
/*
* Copyright (c) 2015 Intel Corporation.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file Contains configuration for ia32_pci platforms.
*/
#include <stdio.h>
#include <stdint.h>
#include <device.h>
#include <init.h>
#include "board.h"
#ifdef CONFIG_NS16550
#include <uart.h>
#include <bluetooth/uart.h>
#include <console/uart_console.h>
#include <serial/ns16550.h>
#if defined(CONFIG_UART_CONSOLE) || defined(CONFIG_BLUETOOTH_UART)
/**
* @brief Initialize NS16550 serial port #1
*
* @param dev The UART device struct
*
* @return DEV_OK if successful, otherwise failed.
*/
static int ns16550_uart_init(struct device *dev)
{
#if defined(CONFIG_UART_CONSOLE)
struct uart_init_info info = {
.baud_rate = CONFIG_UART_CONSOLE_BAUDRATE,
.sys_clk_freq = UART_XTAL_FREQ,
};
if (dev == UART_CONSOLE_DEV) {
uart_init(UART_CONSOLE_DEV, &info);
}
#endif
return DEV_OK;
}
#else
static int ns16550_uart_init(struct device *dev)
{
ARG_UNUSED(dev);
return DEV_OK;
}
#endif /* CONFIG_UART_CONSOLE || CONFIG_BLUETOOTH_UART */
/**
* @brief UART Device configuration.
*
* This contains the device configuration for UART.
*/
struct uart_device_config_t ns16550_uart_dev_cfg[] = {
{
.port = CONFIG_NS16550_PORT_0_BASE_ADDR,
.port_init = ns16550_uart_port_init,
#if defined(CONFIG_UART_CONSOLE) || defined(CONFIG_BLUETOOTH_UART)
.config_func = ns16550_uart_init,
#endif
.pci_dev.class = PCI_CLASS_COMM_CTLR,
.pci_dev.bus = CONFIG_UART_PCI_BUS,
.pci_dev.dev = CONFIG_UART_PCI_DEV,
.pci_dev.vendor_id = CONFIG_UART_PCI_VENDOR_ID,
.pci_dev.device_id = CONFIG_UART_PCI_DEVICE_ID,
.pci_dev.function = CONFIG_UART_PORT_0_FUNCTION,
.pci_dev.bar = CONFIG_UART_PCI_BAR,
},
{
.port = CONFIG_NS16550_PORT_1_BASE_ADDR,
.port_init = ns16550_uart_port_init,
#if defined(CONFIG_UART_CONSOLE) || defined(CONFIG_BLUETOOTH_UART)
.config_func = ns16550_uart_init,
#endif
.pci_dev.class = PCI_CLASS_COMM_CTLR,
.pci_dev.bus = CONFIG_UART_PCI_BUS,
.pci_dev.dev = CONFIG_UART_PCI_DEV,
.pci_dev.vendor_id = CONFIG_UART_PCI_VENDOR_ID,
.pci_dev.device_id = CONFIG_UART_PCI_DEVICE_ID,
.pci_dev.function = CONFIG_UART_PORT_1_FUNCTION,
.pci_dev.bar = CONFIG_UART_PCI_BAR,
},
/* Add pre-configured ports after this. */
};
/**< Device data */
static struct uart_ns16550_dev_data_t ns16550_uart_dev_data[2];
/* UART 0 */
DECLARE_DEVICE_INIT_CONFIG(ns16550_uart0,
CONFIG_UART_PORT_0_NAME,
&uart_platform_init,
&ns16550_uart_dev_cfg[0]);
#if (defined(CONFIG_EARLY_CONSOLE) && \
defined(CONFIG_UART_CONSOLE) && \
(CONFIG_UART_CONSOLE_INDEX == 0))
SYS_DEFINE_DEVICE(ns16550_uart0, &ns16550_uart_dev_data[0], PRIMARY,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#else
SYS_DEFINE_DEVICE(ns16550_uart0, &ns16550_uart_dev_data[0], SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
#endif /* CONFIG_EARLY_CONSOLE */
/* UART 1 */
DECLARE_DEVICE_INIT_CONFIG(ns16550_uart1,
CONFIG_UART_PORT_1_NAME,
&uart_platform_init,
&ns16550_uart_dev_cfg[1]);
#if (defined(CONFIG_EARLY_CONSOLE) && \
defined(CONFIG_UART_CONSOLE) && \
(CONFIG_UART_CONSOLE_INDEX == 1))
SYS_DEFINE_DEVICE(ns16550_uart1, &ns16550_uart_dev_data[1], PRIMARY,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#else
SYS_DEFINE_DEVICE(ns16550_uart1, &ns16550_uart_dev_data[1], SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
#endif /* CONFIG_EARLY_CONSOLE */
/**< UART Devices */
struct device * const uart_devs[] = {
&__initconfig_ns16550_uart0,
&__initconfig_ns16550_uart1,
};
#endif

48
arch/x86/platforms/quark_d2000/Kconfig
View file

@ -59,4 +59,52 @@ config KERNEL_INIT_PRIORITY_DEVICE
config UART_CONSOLE_PRIORITY
default 60
if UART_NS16550
config UART_NS16550_PORT_0
def_bool y
if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0xB0002000
config UART_NS16550_PORT_0_IRQ
default 40
config UART_NS16550_PORT_0_IRQ_PRI
default 3
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 32000000
config UART_NS16550_PORT_0_OPTIONS
default 0
endif # UART_NS16550_PORT_0
config UART_NS16550_PORT_1
def_bool y
if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0xB0002400
config UART_NS16550_PORT_1_IRQ
default 38
config UART_NS16550_PORT_1_IRQ_PRI
default 3
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 32000000
config UART_NS16550_PORT_1_OPTIONS
default 0
endif # UART_NS16550_PORT_1
endif # UART_NS16550
endif

1
arch/x86/platforms/quark_d2000/Makefile
View file

@ -3,5 +3,4 @@ ccflags-y +=-I$(srctree)/include/drivers
ccflags-y +=-I$(srctree)/drivers
asflags-y := ${ccflags-y}
obj-y += quark_d2000_config.o
obj-y += system.o

35
arch/x86/platforms/quark_d2000/board.h
View file

@ -119,39 +119,20 @@ struct scss_interrupt {
#define SYNOPSIS_UART_DLF_OFFSET 0xc0
#define SYNOPSIS_UART_DLF_115200_VAL 0x06
#define COM1_BASE_ADRS 0xB0002000
#define COM1_INT_LVL 0x08 /* UART_A connected to IRQ8 */
#define COM1_INT_VEC (INT_VEC_IRQ0 + COM1_INT_LVL)
#define COM1_INT_PRI 3
#define COM1_BAUD_RATE 115200
#define COM1_DLF SYNOPSIS_UART_DLF_115200_VAL
#define COM2_BASE_ADRS 0xB0002400
#define COM2_INT_LVL 0x06 /* UART_B connected to IRQ6 */
#define COM2_INT_VEC (INT_VEC_IRQ0 + COM2_INT_LVL)
#define COM2_INT_PRI 3
#define COM2_BAUD_RATE 115200
#define COM2_DLF SYNOPSIS_UART_DLF_115200_VAL
#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */
/*
* On the board the UART works on the same clock frequency as CPU.
*/
#define UART_XTAL_FREQ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
/* UART uses level triggered interrupt, low level */
#define UART_IOAPIC_FLAGS (IOAPIC_LEVEL)
/* uart configuration settings */
#define CONFIG_UART0_CONSOLE_REGS COM1_BASE_ADRS
#define CONFIG_UART0_CONSOLE_IRQ COM1_INT_LVL
#define CONFIG_UART0_CONSOLE_INT_PRI COM1_INT_PRI
#define CONFIG_UART0_CONSOLE_IRQ CONFIG_UART_NS16550_PORT_0_IRQ
#define CONFIG_UART0_CONSOLE_INT_PRI CONFIG_UART_NS16550_PORT_0_IRQ_PRI
#define CONFIG_UART1_CONSOLE_REGS COM2_BASE_ADRS
#define CONFIG_UART1_CONSOLE_IRQ COM2_INT_LVL
#define CONFIG_UART1_CONSOLE_INT_PRI COM2_INT_PRI
#define CONFIG_UART1_CONSOLE_IRQ CONFIG_UART_NS16550_PORT_1_IRQ
#define CONFIG_UART1_CONSOLE_INT_PRI CONFIG_UART_NS16550_PORT_1_IRQ_PRI
#ifndef _ASMLANGUAGE
extern struct device * const uart_devs[];
@ -161,12 +142,12 @@ extern struct device * const uart_devs[];
#if defined(CONFIG_UART_CONSOLE)
#if (CONFIG_UART_CONSOLE_INDEX == 0)
#define CONFIG_UART_BAUDRATE COM1_BAUD_RATE
#define CONFIG_UART_BAUDRATE CONFIG_UART_NS16550_PORT_0_BAUD_RATE
#define CONFIG_UART_CONSOLE_INT_PRI CONFIG_UART0_CONSOLE_INT_PRI
#define CONFIG_UART_CONSOLE_IRQ CONFIG_UART0_CONSOLE_IRQ
#define CONFIG_UART_CONSOLE_IRQ CONFIG_UART0_CONSOLE_IRQ
#elif (CONFIG_UART_CONSOLE_INDEX == 1)
#define CONFIG_UART_BAUDRATE COM2_BAUD_RATE
#define CONFIG_UART_CONSOLE_IRQ CONFIG_UART1_CONSOLE_IRQ
#define CONFIG_UART_BAUDRATE CONFIG_UART_NS16550_PORT_1_BAUD_RATE
#define CONFIG_UART_CONSOLE_IRQ CONFIG_UART1_CONSOLE_IRQ
#define CONFIG_UART_CONSOLE_INT_PRI CONFIG_UART1_CONSOLE_INT_PRI
#endif /* CONFIG_UART_CONSOLE_INDEX */

119
arch/x86/platforms/quark_d2000/quark_d2000_config.c
View file

@ -1,119 +0,0 @@
/*
* Copyright (c) 2015 Intel Corporation.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file Board config file for Quark D2000
*/
#include <device.h>
#include <init.h>
#include <nanokernel.h>
#include "board.h"
#ifdef CONFIG_NS16550
#include <uart.h>
#include <console/uart_console.h>
#include <serial/ns16550.h>
#if defined(CONFIG_UART_CONSOLE)
/**
* @brief Initialize NS16550 serial port #1
*
* UART #1 is being used as console. So initialize it
* for console I/O.
*
* @param dev The UART device struct
*
* @return DEV_OK if successful, otherwise failed.
*/
static int ns16550_uart_console_init(struct device *dev)
{
struct uart_init_info info = {
.baud_rate = CONFIG_UART_CONSOLE_BAUDRATE,
.sys_clk_freq = UART_XTAL_FREQ,
.irq_pri = CONFIG_UART_CONSOLE_INT_PRI
};
/* enable clock gating */
#if (CONFIG_UART_CONSOLE_INDEX == 0)
sys_set_bit(CLOCK_PERIPHERAL_BASE_ADDR, 17);
#elif (CONFIG_UART_CONSOLE_INDEX == 1)
sys_set_bit(CLOCK_PERIPHERAL_BASE_ADDR, 18);
#endif
sys_set_bit(CLOCK_PERIPHERAL_BASE_ADDR, 1);
uart_init(UART_CONSOLE_DEV, &info);
return DEV_OK;
}
#endif /* CONFIG_UART_CONSOLE */
struct uart_device_config ns16550_uart_dev_cfg[] = {
{
.port = CONFIG_UART0_CONSOLE_REGS,
.irq = CONFIG_UART0_CONSOLE_IRQ,
.irq_pri = CONFIG_UART0_CONSOLE_INT_PRI,
.port_init = ns16550_uart_port_init,
#if defined(CONFIG_UART_CONSOLE)
.config_func = ns16550_uart_console_init,
#endif
},
{
.port = CONFIG_UART1_CONSOLE_REGS,
.irq = CONFIG_UART1_CONSOLE_IRQ,
.irq_pri = CONFIG_UART1_CONSOLE_INT_PRI,
.port_init = ns16550_uart_port_init,
#if defined(CONFIG_UART_CONSOLE)
.config_func = ns16550_uart_console_init,
#endif
},
};
struct uart_ns16550_dev_data_t ns16550_uart_dev_data[2];
/* UART 0 */
DECLARE_DEVICE_INIT_CONFIG(ns16550_uart0,
CONFIG_UART_PORT_0_NAME,
&uart_platform_init,
&ns16550_uart_dev_cfg[0]);
SYS_DEFINE_DEVICE(ns16550_uart0, &ns16550_uart_dev_data[0],
SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
/* UART 1 */
DECLARE_DEVICE_INIT_CONFIG(ns16550_uart1,
CONFIG_UART_PORT_1_NAME,
&uart_platform_init,
&ns16550_uart_dev_cfg[1]);
SYS_DEFINE_DEVICE(ns16550_uart1, &ns16550_uart_dev_data[1],
SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
struct device * const uart_devs[] = {
&__initconfig_ns16550_uart0,
&__initconfig_ns16550_uart1,
};
#endif

19
arch/x86/platforms/quark_d2000/system.c
View file

@ -43,10 +43,25 @@ hardware for the Quark D2000 BSP.
static int quark_d2000_init(struct device *arg)
{
ARG_UNUSED(arg);
*((unsigned char *)(COM1_BASE_ADRS + SYNOPSIS_UART_DLF_OFFSET)) =
#ifdef CONFIG_UART_NS16550
/* enable clock gating */
#ifdef CONFIG_UART_NS16550_PORT_0
sys_set_bit(CLOCK_PERIPHERAL_BASE_ADDR, 17);
*((unsigned char *)(CONFIG_UART_NS16550_PORT_0_BASE_ADDR
+ SYNOPSIS_UART_DLF_OFFSET)) =
COM1_DLF;
*((unsigned char *)(COM2_BASE_ADRS + SYNOPSIS_UART_DLF_OFFSET)) =
#endif
#ifdef CONFIG_UART_NS16550_PORT_1
sys_set_bit(CLOCK_PERIPHERAL_BASE_ADDR, 18);
*((unsigned char *)(CONFIG_UART_NS16550_PORT_1_BASE_ADDR
+ SYNOPSIS_UART_DLF_OFFSET)) =
COM2_DLF;
#endif
sys_set_bit(CLOCK_PERIPHERAL_BASE_ADDR, 1);
#endif /* CONFIG_UART_NS16550 */
return 0;
}

48
arch/x86/platforms/quark_se/Kconfig
View file

@ -185,4 +185,52 @@ config GPIO_DW_INIT_PRIORITY
config I2C_INIT_PRIORITY
default 60
if UART_NS16550
config UART_NS16550_PORT_0
def_bool y
if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0xB0002000
config UART_NS16550_PORT_0_IRQ
default 37
config UART_NS16550_PORT_0_IRQ_PRI
default 3
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 32000000
config UART_NS16550_PORT_0_OPTIONS
default 0
endif # UART_NS16550_PORT_0
config UART_NS16550_PORT_1
def_bool y
if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0xB0002400
config UART_NS16550_PORT_1_IRQ
default 38
config UART_NS16550_PORT_1_IRQ_PRI
default 3
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 32000000
config UART_NS16550_PORT_1_OPTIONS
default 0
endif # UART_NS16550_PORT_1
endif # UART_NS16550
endif #PLATFORM_QUARK_SE_X86

32
arch/x86/platforms/quark_se/board.h
View file

@ -84,50 +84,24 @@
/* serial port (aka COM port) information */
#ifdef CONFIG_NS16550
#define COM1_BASE_ADRS 0xB0002000
#define COM1_INT_LVL 0x05 /* COM1 connected to IRQ5 */
#define COM1_INT_VEC (INT_VEC_IRQ0 + COM1_INT_LVL)
#define COM1_INT_PRI 3
#define COM1_BAUD_RATE 115200
#define COM2_BASE_ADRS 0xB0002400
#define COM2_INT_LVL 0x06 /* COM2 connected to IRQ6 */
#define COM2_INT_VEC (INT_VEC_IRQ0 + COM2_INT_LVL)
#define COM2_INT_PRI 3
#define COM2_BAUD_RATE 115200
#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */
#define UART_XTAL_FREQ 32000000
#ifdef CONFIG_UART_NS16550
/* UART uses level triggered interrupt, low level */
#define UART_IOAPIC_FLAGS (IOAPIC_LEVEL | IOAPIC_LOW)
/* uart configuration settings */
/* Generic definitions */
#define CONFIG_UART_BAUDRATE COM2_BAUD_RATE
#define CONFIG_UART_PORT_0_REGS COM1_BASE_ADRS
#define CONFIG_UART_PORT_0_IRQ COM1_INT_VEC
#define CONFIG_UART_CONSOLE_IRQ CONFIG_UART_PORT_0_IRQ
#define CONFIG_UART_PORT_0_IRQ_PRIORITY COM1_INT_PRI
#define CONFIG_UART_PORT_1_REGS COM2_BASE_ADRS
#define CONFIG_UART_PORT_1_IRQ COM2_INT_VEC
#define CONFIG_UART_PORT_1_IRQ_PRIORITY COM2_INT_PRI
extern struct device * const uart_devs[];
/* Console definitions */
#if defined(CONFIG_UART_CONSOLE)
#define CONFIG_UART_CONSOLE_INT_PRI COM2_INT_PRI
#define CONFIG_UART_CONSOLE_INT_PRI CONFIG_UART_NS16550_PORT1_IRQ
#define UART_CONSOLE_DEV (uart_devs[CONFIG_UART_CONSOLE_INDEX])
#endif /* CONFIG_UART_CONSOLE */
#endif
#endif /* CONFIG_UART_NS16550 */
#ifndef _ASMLANGUAGE

78
arch/x86/platforms/quark_se/quark_se_config.c
View file

@ -23,84 +23,6 @@
#include <nanokernel.h>
#include <arch/cpu.h>
#ifdef CONFIG_NS16550
#include <uart.h>
#include <console/uart_console.h>
#include <serial/ns16550.h>
#if defined(CONFIG_UART_CONSOLE)
#if defined(CONFIG_PRINTK) || defined(CONFIG_STDOUT_CONSOLE)
/**
* @brief Initialize NS16550 serial port #1
*
* UART #1 is being used as console. So initialize it
* for console I/O.
*
* @param dev The UART device struct
*
* @return DEV_OK if successful, otherwise failed.
*/
static int ns16550_uart_console_init(struct device *dev)
{
struct uart_init_info info = {
.baud_rate = CONFIG_UART_CONSOLE_BAUDRATE,
.sys_clk_freq = UART_XTAL_FREQ,
.irq_pri = CONFIG_UART_CONSOLE_INT_PRI
};
uart_init(UART_CONSOLE_DEV, &info);
return DEV_OK;
}
#else
static int ns16550_uart_console_init(struct device *dev)
{
ARG_UNUSED(dev);
return DEV_OK;
}
#endif
#endif
/* UART 1 */
static struct uart_device_config ns16550_uart1_dev_cfg = {
.port = CONFIG_UART_PORT_1_REGS,
.irq = CONFIG_UART_PORT_1_IRQ,
.irq_pri = CONFIG_UART_PORT_1_IRQ_PRIORITY,
.port_init = ns16550_uart_port_init,
#if (defined(CONFIG_UART_CONSOLE) && (CONFIG_UART_CONSOLE_INDEX == 0))
.config_func = ns16550_uart_console_init,
#endif
};
DECLARE_DEVICE_INIT_CONFIG(ns16550_uart1,
CONFIG_UART_PORT_1_NAME,
&uart_platform_init,
&ns16550_uart1_dev_cfg);
static struct uart_ns16550_dev_data_t ns16550_uart1_dev_data;
SYS_DEFINE_DEVICE(ns16550_uart1, &ns16550_uart1_dev_data,
PRIMARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
/**
* @brief UART devices
*
*/
struct device * const uart_devs[] = {
&__initconfig_ns16550_uart1,
};
#endif
#if CONFIG_IPI_QUARK_SE
#include <ipi.h>
#include <ipi/ipi_quark_se.h>

3
configs/arduino_101_defconfig
View file

@ -3,8 +3,9 @@ CONFIG_PLATFORM_QUARK_SE=y
CONFIG_CPU_MINUTEIA=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_CONSOLE_INDEX=1
CONFIG_SERIAL=y
CONFIG_NS16550=y
CONFIG_UART_NS16550=y
CONFIG_PRINTK=y
CONFIG_IPI=y
CONFIG_IPI_QUARK_SE=y

2
configs/basic_atom_defconfig
View file

@ -11,7 +11,7 @@ CONFIG_PIC_DISABLE=y
CONFIG_LOAPIC=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_NS16550=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000

2
configs/basic_minuteia_defconfig
View file

@ -11,7 +11,7 @@ CONFIG_PIC_DISABLE=y
CONFIG_LOAPIC=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_NS16550=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000

3
configs/galileo_defconfig
View file

@ -6,8 +6,7 @@ CONFIG_CPU_MINUTEIA=y
CONFIG_PCI_LEGACY_BRIDGE=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_NS16550=y
CONFIG_NS16550_PCI=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_HPET_TIMER_LEVEL_LOW=y
CONFIG_SERIAL_INTERRUPT_LOW=y

3
configs/generic_arc_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_PLATFORM_GENERIC_ARC=y
CONFIG_CPU_ARCEM4=y
CONFIG_CPU_ARCV2=y
CONFIG_RAM_START=0xa8000000
CONFIG_SERIAL=y
CONFIG_NS16550=y
CONFIG_RAM_SIZE=0x14000
CONFIG_ARCV2_INTERRUPT_UNIT=y
CONFIG_ARCV2_TIMER=y

2
configs/quark_d2000_defconfig
View file

@ -3,7 +3,7 @@ CONFIG_PLATFORM_QUARK_D2000=y
CONFIG_CPU_MINUTEIA=y
CONFIG_IDT_NUM_VECTORS=64
CONFIG_LOAPIC_TIMER_DIVIDER_UNSUPPORTED=y
CONFIG_NS16550=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y

4
configs/quark_se_defconfig
View file

@ -4,11 +4,11 @@ CONFIG_CPU_MINUTEIA=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_NS16550=y
CONFIG_UART_NS16550=y
CONFIG_PRINTK=y
CONFIG_IPI=y
CONFIG_IPI_QUARK_SE=y
CONFIG_IPI_QUARK_SE_MASTER=y
CONFIG_IPI_CONSOLE_RECEIVER=y
CONFIG_ARC_INIT=y
CONFIG_UART_CONSOLE_INDEX=1

30
drivers/serial/Kconfig
View file

@ -60,35 +60,7 @@ config UART_INTERRUPT_DRIVEN
input and UART based drivers.
endmenu
config NS16550
bool "NS16550 serial driver"
default n
select SERIAL_HAS_DRIVER
help
This option enables the NS16550 serial driver.
This driver can be used for the serial hardware
available on x86 platforms such as basic_atom and
basic_minuteia.
config NS16550_PCI
bool "NS16550 PCI serial driver"
default n
depends on PCI && NS16550
help
This enables NS16550 to probe for PCI-based serial devices.
This option enables the driver to auto-detect the device
configuration required to access those ports.
config NS16550_PORT_0_BASE_ADDR
hex "NS16550 port 0 PCI base address"
default 0x00000000
depends on NS16550_PCI
config NS16550_PORT_1_BASE_ADDR
hex "NS16550 port 1 PCI base address"
default 0x00000000
depends on NS16550_PCI
source "drivers/serial/Kconfig.ns16550"
config K20_UART
bool "K20 serial driver"

296
drivers/serial/Kconfig.ns16550 Normal file
View file

@ -0,0 +1,296 @@
menuconfig UART_NS16550
bool "NS16550 serial driver"
default n
select SERIAL_HAS_DRIVER
help
This option enables the NS16550 serial driver.
This driver can be used for the serial hardware
available on x86 platforms.
config UART_NS16550_PCI
bool "Enable PCI Support"
default n
depends on PCI && UART_NS16550
help
This enables NS16550 to probe for PCI-based serial devices.
This option enables the driver to auto-detect the device
configuration required to access those ports.
choice
prompt "Controller Registers Access Method"
depends on UART_NS16550
default UART_NS16550_ACCESS_IOPORT if PLATFORM_IA32
default UART_NS16550_ACCESS_MMIO
config UART_NS16550_ACCESS_MMIO
bool "Memory mapped I/O"
help
The UART controller is mapped to memory space, and can be directly
access through memory manipulation.
config UART_NS16550_ACCESS_IOPORT
bool "I/O Port"
depends on !UART_NS16550_PCI
help
The UART controller is accessed through I/O port.
endchoice
# ---------- Port 0 ----------
menuconfig UART_NS16550_PORT_0
bool "Enable NS16550 Port 0"
default n
depends on UART_NS16550
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_NS16550_PORT_0_NAME
string "Port 0 Device Name"
default "UART_0"
depends on UART_NS16550_PORT_0
help
This is the device name for UART, and is included in the device
struct.
config UART_NS16550_PORT_0_BASE_ADDR
hex "Port 0 Base Address or I/O Port"
default 0x00000000
depends on UART_NS16550_PORT_0
help
The base address of UART port.
Leave this at 0x00000000 to skip initialization at boot.
For PCI device, this value is from PCI configuration space, so just
leave it at 0x00000000.
config UART_NS16550_PORT_0_IRQ
int "Port 0 Interrupt Vector"
default 0
depends on UART_NS16550_PORT_0
help
The interrupt vector for UART port. This is used for interrupt driven
transfers.
For PCI device, this value is from PCI configuration space, so just
leave it at 0x00.
config UART_NS16550_PORT_0_IRQ_PRI
int "Port 0 Interrupt Priority"
default 0
depends on UART_NS16550_PORT_0
help
The interrupt priority for UART port.
config UART_NS16550_PORT_0_BAUD_RATE
int "Port 0 Baud Rate"
default 0
depends on UART_NS16550_PORT_0
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.
config UART_NS16550_PORT_0_CLK_FREQ
int "Port 0 Clock Frequency"
default 0
depends on UART_NS16550_PORT_0
help
The clock frequency for UART port.
config UART_NS16550_PORT_0_OPTIONS
int "Port 0 Options"
default 0
depends on UART_NS16550_PORT_0
help
Options used for port initialization.
config UART_NS16550_PORT_0_PCI
bool "Port 0 is PCI-based"
default n
depends on UART_NS16550_PCI && UART_NS16550_PORT_0
help
Obtain port information from PCI.
config UART_NS16550_PORT_0_PCI_CLASS
hex "Port 0 PCI Class"
default 0x07
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
Value 0x07 is for simple communication controllers.
config UART_NS16550_PORT_0_PCI_BUS
int "Port 0 PCI Bus Number"
default 0
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_0_PCI_DEV
int "Port 0 PCI Device Number"
default 0
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_0_PCI_VENDOR_ID
hex "Port 0 PCI Vendor ID"
default 0x0000
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_0_PCI_DEVICE_ID
hex "Port 0 PCI Device ID"
default 0x0000
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_0_PCI_FUNC
int "Port 0 PCI Function"
default 0
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_0_PCI_BAR
int "Port 0 PCI BAR"
default 0
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
# ---------- Port 1 ----------
menuconfig UART_NS16550_PORT_1
bool "Enable NS16550 Port 1"
default n
depends on UART_NS16550
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_NS16550_PORT_1_NAME
string "Port 1 Device Name"
default "UART_1"
depends on UART_NS16550_PORT_1
help
This is the device name for UART, and is included in the device
struct.
config UART_NS16550_PORT_1_BASE_ADDR
hex "Port 1 Base Address or I/O Port"
default 0x00000000
depends on UART_NS16550_PORT_1
help
The base address of UART port.
Leave this at 0x00000000 to skip initialization at boot.
For PCI device, this value is from PCI configuration space, so just
leave it at 0x00000000.
config UART_NS16550_PORT_1_IRQ
int "Port 1 Interrupt Vector"
default 0
depends on UART_NS16550_PORT_1
help
The interrupt vector for UART port. This is used for interrupt driven
transfers.
For PCI device, this value is from PCI configuration space, so just
leave it at 0x00.
config UART_NS16550_PORT_1_IRQ_PRI
int "Port 1 Interrupt Priority"
default 0
depends on UART_NS16550_PORT_1
help
The interrupt priority for UART port.
config UART_NS16550_PORT_1_BAUD_RATE
int "Port 1 Baud Rate"
default 0
depends on UART_NS16550_PORT_1
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.
config UART_NS16550_PORT_1_CLK_FREQ
int "Port 1 Clock Frequency"
default 0
depends on UART_NS16550_PORT_1
help
The clock frequency for UART port.
config UART_NS16550_PORT_1_OPTIONS
int "Port 1 Options"
default 0
depends on UART_NS16550_PORT_1
help
Options used for port initialization.
config UART_NS16550_PORT_1_PCI
bool "Port 1 is PCI-based"
default n
depends on UART_NS16550_PCI && UART_NS16550_PORT_1
help
Obtain port information from PCI.
config UART_NS16550_PORT_1_PCI_CLASS
hex "Port 1 PCI Class"
default 0x07
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
Value 0x07 is for simple communication controllers.
config UART_NS16550_PORT_1_PCI_BUS
int "Port 1 PCI Bus Number"
default 0
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_1_PCI_DEV
int "Port 1 PCI Device Number"
default 0
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_1_PCI_VENDOR_ID
hex "Port 1 PCI Vendor ID"
default 0x0000
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_1_PCI_DEVICE_ID
hex "Port 1 PCI Device ID"
default 0x0000
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_1_PCI_FUNC
int "Port 1 PCI Function"
default 0
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_1_PCI_BAR
int "Port 1 PCI BAR"
default 0
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.

2
drivers/serial/Makefile
View file

@ -1,5 +1,5 @@
obj-$(CONFIG_SERIAL) += serial.o
obj-$(CONFIG_NS16550) += ns16550.o
obj-$(CONFIG_UART_NS16550) += uart_ns16550.o
obj-$(CONFIG_K20_UART) += k20UartDrv.o
obj-$(CONFIG_STELLARIS_UART) += stellarisUartDrv.o
obj-$(CONFIG_NSIM) += nsim_uart.o

34
drivers/serial/ns16550.h
View file

@ -1,34 +0,0 @@
/*
* Copyright (c) 2015 Intel Corporation.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file Header file for ns16550 UART driver
*/
#ifndef _DRIVERS_UART_NS16550_H_
#define _DRIVERS_UART_NS16550_H_
#include <uart.h>
/** Device data structure */
struct uart_ns16550_dev_data_t {
uint8_t iir_cache; /**< cache of IIR since it clears when read */
};
void ns16550_uart_port_init(struct device *,
const struct uart_init_info * const);
#endif /* _DRIVERS_UART_NS16550_H_ */

218
drivers/serial/ns16550.c → drivers/serial/uart_ns16550.c
View file

@ -22,7 +22,7 @@
* This is the driver for the Intel NS16550 UART Chip used on the PC 386.
* It uses the SCCs in asynchronous mode only.
*
* Before individual UART port can be used, ns16550_uart_port_init() has to be
* Before individual UART port can be used, uart_ns16550_port_init() has to be
* called to setup the port.
*
* - the following macro for the number of bytes between register addresses:
@ -35,17 +35,17 @@
#include <stdint.h>
#include <board.h>
#include <init.h>
#include <toolchain.h>
#include <sections.h>
#include <uart.h>
#include <sys_io.h>
#ifdef CONFIG_PCI
#include <pci/pci.h>
#include <pci/pci_mgr.h>
#endif /* CONFIG_PCI */
#include "ns16550.h"
/* register definitions */
#define REG_THR 0x00 /* Transmitter holding reg. */
@ -74,7 +74,7 @@
#define IIR_MSTAT 0x00 /* modem status interrupt */
#define IIR_THRE 0X02 /* transmit holding register empty */
#define IIR_RBRF 0x04 /* receiver buffer register full */
#define IIR_ID 0x06 /* interupt ID mask without IP */
#define IIR_ID 0x06 /* interrupt ID mask without IP */
#define IIR_SEOB 0x06 /* serialization error or break */
/* equates for FIFO control register */
@ -186,22 +186,35 @@
#define IIRC(dev) (DEV_DATA(dev)->iir_cache)
#if (defined(CONFIG_IA32_LEGACY_IO_PORTS) && !defined(CONFIG_NS16550_PCI))
#ifdef CONFIG_UART_NS16550_ACCESS_IOPORT
#define INBYTE(x) sys_in8(x)
#define OUTBYTE(x, d) sys_out8(d, x)
#else
#define UART_REG_ADDR_INTERVAL 1 /* address diff of adjacent regs. */
#endif /* CONFIG_UART_NS16550_ACCESS_IOPORT */
#ifdef CONFIG_UART_NS16550_ACCESS_MMIO
#define INBYTE(x) sys_read8(x)
#define OUTBYTE(x, d) sys_write8(d, x)
#endif /* CONFIG_IA32_LEGACY_IO_PORTS/CONFIG_NS16550_PCI */
#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */
#endif /* CONFIG_UART_NS16550_ACCESS_MMIO */
static struct uart_driver_api ns16550_uart_driver_api;
/** Device data structure */
struct uart_ns16550_dev_data_t {
uint8_t iir_cache; /**< cache of IIR since it clears when read */
};
#if defined(CONFIG_NS16550_PCI)
static struct uart_driver_api uart_ns16550_driver_api;
#if defined(CONFIG_UART_NS16550_PCI)
static inline int ns16550_pci_uart_scan(struct device *dev)
{
struct uart_device_config * const dev_cfg = DEV_CFG(dev);
if (dev_cfg->pci_dev.vendor_id == 0x0000) {
return DEV_INVALID_CONF;
}
pci_bus_scan_init();
if (!pci_bus_scan(&dev_cfg->pci_dev)) {
@ -222,10 +235,10 @@ static inline int ns16550_pci_uart_scan(struct device *dev)
#define ns16550_pci_uart_scan(_unused_) (1)
#endif /* CONFIG_NS16550_PCI */
#endif /* CONFIG_UART_NS16550_PCI */
/**
* @brief Initialize the chip
* @brief Initialize individual UART port
*
* This routine is called to reset the chip in a quiescent state.
*
@ -234,7 +247,7 @@ static inline int ns16550_pci_uart_scan(struct device *dev)
*
* @return N/A
*/
void ns16550_uart_port_init(struct device *dev,
void uart_ns16550_port_init(struct device *dev,
const struct uart_init_info * const init_info)
{
struct uart_device_config * const dev_cfg = DEV_CFG(dev);
@ -244,22 +257,23 @@ void ns16550_uart_port_init(struct device *dev,
uint32_t divisor; /* baud rate divisor */
uint8_t mdc = 0;
if (!ns16550_pci_uart_scan(dev)) {
if ((dev_cfg->port == 0) && !ns16550_pci_uart_scan(dev)) {
return;
}
dev_cfg->irq_pri = init_info->irq_pri;
dev_data->iir_cache = 0;
old_level = irq_lock();
/* calculate baud rate divisor */
divisor = (init_info->sys_clk_freq / init_info->baud_rate) >> 4;
if ((init_info->baud_rate != 0) && (init_info->sys_clk_freq != 0)) {
/* calculate baud rate divisor */
divisor = (init_info->sys_clk_freq / init_info->baud_rate) >> 4;
/* set the DLAB to access the baud rate divisor registers */
OUTBYTE(LCR(dev), LCR_DLAB);
OUTBYTE(BRDL(dev), (unsigned char)(divisor & 0xff));
OUTBYTE(BRDH(dev), (unsigned char)((divisor >> 8) & 0xff));
/* set the DLAB to access the baud rate divisor registers */
OUTBYTE(LCR(dev), LCR_DLAB);
OUTBYTE(BRDL(dev), (unsigned char)(divisor & 0xff));
OUTBYTE(BRDH(dev), (unsigned char)((divisor >> 8) & 0xff));
}
/* 8 data bits, 1 stop bit, no parity, clear DLAB */
OUTBYTE(LCR(dev), LCR_CS8 | LCR_1_STB | LCR_PDIS);
@ -286,7 +300,21 @@ void ns16550_uart_port_init(struct device *dev,
irq_unlock(old_level);
dev->driver_api = &ns16550_uart_driver_api;
dev->driver_api = &uart_ns16550_driver_api;
}
/**
* @brief UART Initialization function
*
* @param dev UART device struct
*
* @return DEV_OK if successful, failed otherwise
*/
static int uart_ns16550_init(struct device *dev)
{
uart_ns16550_port_init(dev, &DEV_CFG(dev)->init_info);
return DEV_OK;
}
/**
@ -297,7 +325,7 @@ void ns16550_uart_port_init(struct device *dev,
*
* @return 0 if a character arrived, -1 if the input buffer if empty.
*/
static int ns16550_uart_poll_in(struct device *dev, unsigned char *c)
static int uart_ns16550_poll_in(struct device *dev, unsigned char *c)
{
if ((INBYTE(LSR(dev)) & LSR_RXRDY) == 0x00)
return (-1);
@ -322,7 +350,7 @@ static int ns16550_uart_poll_in(struct device *dev, unsigned char *c)
*
* @return Sent character
*/
static unsigned char ns16550_uart_poll_out(struct device *dev,
static unsigned char uart_ns16550_poll_out(struct device *dev,
unsigned char c)
{
/* wait for transmitter to ready to accept a character */
@ -345,7 +373,7 @@ static unsigned char ns16550_uart_poll_out(struct device *dev,
*
* @return Number of bytes sent
*/
static int ns16550_uart_fifo_fill(struct device *dev, const uint8_t *tx_data,
static int uart_ns16550_fifo_fill(struct device *dev, const uint8_t *tx_data,
int size)
{
int i;
@ -365,7 +393,7 @@ static int ns16550_uart_fifo_fill(struct device *dev, const uint8_t *tx_data,
*
* @return Number of bytes read
*/
static int ns16550_uart_fifo_read(struct device *dev, uint8_t *rx_data,
static int uart_ns16550_fifo_read(struct device *dev, uint8_t *rx_data,
const int size)
{
int i;
@ -384,7 +412,7 @@ static int ns16550_uart_fifo_read(struct device *dev, uint8_t *rx_data,
*
* @return N/A
*/
static void ns16550_uart_irq_tx_enable(struct device *dev)
static void uart_ns16550_irq_tx_enable(struct device *dev)
{
OUTBYTE(IER(dev), INBYTE(IER(dev)) | IER_TBE);
}
@ -396,7 +424,7 @@ static void ns16550_uart_irq_tx_enable(struct device *dev)
*
* @return N/A
*/
static void ns16550_uart_irq_tx_disable(struct device *dev)
static void uart_ns16550_irq_tx_disable(struct device *dev)
{
OUTBYTE(IER(dev), INBYTE(IER(dev)) & (~IER_TBE));
}
@ -408,7 +436,7 @@ static void ns16550_uart_irq_tx_disable(struct device *dev)
*
* @return 1 if an IRQ is ready, 0 otherwise
*/
static int ns16550_uart_irq_tx_ready(struct device *dev)
static int uart_ns16550_irq_tx_ready(struct device *dev)
{
return ((IIRC(dev) & IIR_ID) == IIR_THRE);
}
@ -420,7 +448,7 @@ static int ns16550_uart_irq_tx_ready(struct device *dev)
*
* @return N/A
*/
static void ns16550_uart_irq_rx_enable(struct device *dev)
static void uart_ns16550_irq_rx_enable(struct device *dev)
{
OUTBYTE(IER(dev), INBYTE(IER(dev)) | IER_RXRDY);
}
@ -432,7 +460,7 @@ static void ns16550_uart_irq_rx_enable(struct device *dev)
*
* @return N/A
*/
static void ns16550_uart_irq_rx_disable(struct device *dev)
static void uart_ns16550_irq_rx_disable(struct device *dev)
{
OUTBYTE(IER(dev), INBYTE(IER(dev)) & (~IER_RXRDY));
}
@ -444,7 +472,7 @@ static void ns16550_uart_irq_rx_disable(struct device *dev)
*
* @return 1 if an IRQ is ready, 0 otherwise
*/
static int ns16550_uart_irq_rx_ready(struct device *dev)
static int uart_ns16550_irq_rx_ready(struct device *dev)
{
return ((IIRC(dev) & IIR_ID) == IIR_RBRF);
}
@ -456,7 +484,7 @@ static int ns16550_uart_irq_rx_ready(struct device *dev)
*
* @return N/A
*/
static void ns16550_uart_irq_err_enable(struct device *dev)
static void uart_ns16550_irq_err_enable(struct device *dev)
{
OUTBYTE(IER(dev), INBYTE(IER(dev)) | IER_LSR);
}
@ -468,7 +496,7 @@ static void ns16550_uart_irq_err_enable(struct device *dev)
*
* @return 1 if an IRQ is ready, 0 otherwise
*/
static void ns16550_uart_irq_err_disable(struct device *dev)
static void uart_ns16550_irq_err_disable(struct device *dev)
{
OUTBYTE(IER(dev), INBYTE(IER(dev)) & (~IER_LSR));
}
@ -480,7 +508,7 @@ static void ns16550_uart_irq_err_disable(struct device *dev)
*
* @return 1 if an IRQ is pending, 0 otherwise
*/
static int ns16550_uart_irq_is_pending(struct device *dev)
static int uart_ns16550_irq_is_pending(struct device *dev)
{
return (!(IIRC(dev) & IIR_IP));
}
@ -492,7 +520,7 @@ static int ns16550_uart_irq_is_pending(struct device *dev)
*
* @return Always 1
*/
static int ns16550_uart_irq_update(struct device *dev)
static int uart_ns16550_irq_update(struct device *dev)
{
IIRC(dev) = INBYTE(IIR(dev));
@ -508,7 +536,7 @@ static int ns16550_uart_irq_update(struct device *dev)
*
* @return IRQ number
*/
static unsigned int ns16550_uart_irq_get(struct device *dev)
static unsigned int uart_ns16550_irq_get(struct device *dev)
{
return (unsigned int)DEV_CFG(dev)->irq;
}
@ -516,25 +544,111 @@ static unsigned int ns16550_uart_irq_get(struct device *dev)
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
static struct uart_driver_api ns16550_uart_driver_api = {
.poll_in = ns16550_uart_poll_in,
.poll_out = ns16550_uart_poll_out,
static struct uart_driver_api uart_ns16550_driver_api = {
.poll_in = uart_ns16550_poll_in,
.poll_out = uart_ns16550_poll_out,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.fifo_fill = ns16550_uart_fifo_fill,
.fifo_read = ns16550_uart_fifo_read,
.irq_tx_enable = ns16550_uart_irq_tx_enable,
.irq_tx_disable = ns16550_uart_irq_tx_disable,
.irq_tx_ready = ns16550_uart_irq_tx_ready,
.irq_rx_enable = ns16550_uart_irq_rx_enable,
.irq_rx_disable = ns16550_uart_irq_rx_disable,
.irq_rx_ready = ns16550_uart_irq_rx_ready,
.irq_err_enable = ns16550_uart_irq_err_enable,
.irq_err_disable = ns16550_uart_irq_err_disable,
.irq_is_pending = ns16550_uart_irq_is_pending,
.irq_update = ns16550_uart_irq_update,
.irq_get = ns16550_uart_irq_get,
.fifo_fill = uart_ns16550_fifo_fill,
.fifo_read = uart_ns16550_fifo_read,
.irq_tx_enable = uart_ns16550_irq_tx_enable,
.irq_tx_disable = uart_ns16550_irq_tx_disable,
.irq_tx_ready = uart_ns16550_irq_tx_ready,
.irq_rx_enable = uart_ns16550_irq_rx_enable,
.irq_rx_disable = uart_ns16550_irq_rx_disable,
.irq_rx_ready = uart_ns16550_irq_rx_ready,
.irq_err_enable = uart_ns16550_irq_err_enable,
.irq_err_disable = uart_ns16550_irq_err_disable,
.irq_is_pending = uart_ns16550_irq_is_pending,
.irq_update = uart_ns16550_irq_update,
.irq_get = uart_ns16550_irq_get,
#endif
};
#ifdef CONFIG_UART_NS16550_PORT_0
struct uart_device_config uart_ns16550_dev_cfg_0 = {
.port = CONFIG_UART_NS16550_PORT_0_BASE_ADDR,
.irq = CONFIG_UART_NS16550_PORT_0_IRQ,
.irq_pri = CONFIG_UART_NS16550_PORT_0_IRQ_PRI,
.init_info.baud_rate = CONFIG_UART_NS16550_PORT_0_BAUD_RATE,
.init_info.sys_clk_freq = CONFIG_UART_NS16550_PORT_0_CLK_FREQ,
.init_info.options = CONFIG_UART_NS16550_PORT_0_OPTIONS,
#ifdef CONFIG_UART_NS16550_PORT_0_PCI
.pci_dev.class = CONFIG_UART_NS16550_PORT_0_PCI_CLASS,
.pci_dev.bus = CONFIG_UART_NS16550_PORT_0_PCI_BUS,
.pci_dev.dev = CONFIG_UART_NS16550_PORT_0_PCI_DEV,
.pci_dev.vendor_id = CONFIG_UART_NS16550_PORT_0_PCI_VENDOR_ID,
.pci_dev.device_id = CONFIG_UART_NS16550_PORT_0_PCI_DEVICE_ID,
.pci_dev.function = CONFIG_UART_NS16550_PORT_0_PCI_FUNC,
.pci_dev.bar = CONFIG_UART_NS16550_PORT_0_PCI_BAR,
#endif /* CONFIG_UART_NS16550_PORT_0_PCI */
.port_init = uart_ns16550_port_init,
};
static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_0;
DECLARE_DEVICE_INIT_CONFIG(uart_ns16550_0,
CONFIG_UART_NS16550_PORT_0_NAME,
&uart_ns16550_init,
&uart_ns16550_dev_cfg_0);
SYS_DEFINE_DEVICE(uart_ns16550_0, &uart_ns16550_dev_data_0,
PRIMARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
#endif /* CONFIG_UART_NS16550_PORT_0 */
#ifdef CONFIG_UART_NS16550_PORT_1
struct uart_device_config uart_ns16550_dev_cfg_1 = {
.port = CONFIG_UART_NS16550_PORT_1_BASE_ADDR,
.irq = CONFIG_UART_NS16550_PORT_1_IRQ,
.irq_pri = CONFIG_UART_NS16550_PORT_1_IRQ_PRI,
.init_info.baud_rate = CONFIG_UART_NS16550_PORT_1_BAUD_RATE,
.init_info.sys_clk_freq = CONFIG_UART_NS16550_PORT_1_CLK_FREQ,
.init_info.options = CONFIG_UART_NS16550_PORT_1_OPTIONS,
#ifdef CONFIG_UART_NS16550_PORT_1_PCI
.pci_dev.class = CONFIG_UART_NS16550_PORT_1_PCI_CLASS,
.pci_dev.bus = CONFIG_UART_NS16550_PORT_1_PCI_BUS,
.pci_dev.dev = CONFIG_UART_NS16550_PORT_1_PCI_DEV,
.pci_dev.vendor_id = CONFIG_UART_NS16550_PORT_1_PCI_VENDOR_ID,
.pci_dev.device_id = CONFIG_UART_NS16550_PORT_1_PCI_DEVICE_ID,
.pci_dev.function = CONFIG_UART_NS16550_PORT_1_PCI_FUNC,
.pci_dev.bar = CONFIG_UART_NS16550_PORT_1_PCI_BAR,
#endif /* CONFIG_UART_NS16550_PORT_1_PCI */
.port_init = uart_ns16550_port_init,
};
static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_1;
DECLARE_DEVICE_INIT_CONFIG(uart_ns16550_1,
CONFIG_UART_NS16550_PORT_1_NAME,
&uart_ns16550_init,
&uart_ns16550_dev_cfg_1);
SYS_DEFINE_DEVICE(uart_ns16550_1, &uart_ns16550_dev_data_1,
PRIMARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
#endif /* CONFIG_UART_NS16550_PORT_1 */
/**< UART Devices */
struct device * const uart_devs[] = {
#ifdef CONFIG_UART_NS16550_PORT_0
SYS_GET_DEVICE(uart_ns16550_0),
#else
NULL,
#endif
#ifdef CONFIG_UART_NS16550_PORT_1
SYS_GET_DEVICE(uart_ns16550_1),
#else
NULL,
#endif
};

14
samples/microkernel/apps/nfc_hello/src/main.c
View file

@ -23,8 +23,8 @@
#include <uart.h>
#define UART1 (uart_devs[1])
#define UART1_IRQ COM2_INT_LVL
#define UART1_INT_PRI COM2_INT_PRI
#define UART1_IRQ CONFIG_UART_NS16550_PORT_1_IRQ
#define UART1_IRQ_PRI CONFIG_UART_NS16550_PORT_1_IRQ_PRI
#define BUF_MAXSIZE 256
#define D(fmt, args...) \
@ -61,15 +61,7 @@ static void uart1_isr(void *x)
static void uart1_init(void)
{
struct uart_init_info uart1 = {
.baud_rate = CONFIG_UART_BAUDRATE,
.sys_clk_freq = UART_XTAL_FREQ,
.irq_pri = UART1_INT_PRI,
};
uart_init(UART1, &uart1);
irq_connect(UART1_IRQ, uart1.irq_pri, uart1_isr, 0, UART_IRQ_FLAGS);
irq_connect(UART1_IRQ, UART1_IRQ_PRI, uart1_isr, 0, UART_IRQ_FLAGS);
irq_enable(UART1_IRQ);