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boards: arm: mr_canhubk3: add support for GPIO

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Add GPIO support for mr_canhubk3 board and enable GPIO tests.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
Manuel Arguelles 2023-05-26 00:00:00 +00:00 committed by Mahesh Mahadevan
parent 671d857a60
commit 7319ba11f7
6 changed files with 321 additions and 0 deletions
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17
boards/arm/mr_canhubk3/mr_canhubk3-pinctrl.dtsi Normal file
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@ -0,0 +1,17 @@
/*
* Copyright 2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <nxp/s32/S32K344-172MQFP-pinctrl.h>
&pinctrl {
eirq0_default: eirq0_default {
group1 {
pinmux = <PTD15_EIRQ31>;
input-enable;
};
};
};

56
boards/arm/mr_canhubk3/mr_canhubk3.dts
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@ -6,6 +6,8 @@
/dts-v1/;
#include <arm/nxp/nxp_s32k344_m7.dtsi>
#include <dt-bindings/gpio/gpio.h>
#include "mr_canhubk3-pinctrl.dtsi"
/ {
model = "NXP MR-CANHUBK3";
@ -18,6 +20,42 @@
zephyr,dtcm = &dtcm;
zephyr,code-partition = &code_partition;
};
aliases {
led0 = &user_led1_red;
led1 = &user_led1_green;
led2 = &user_led1_blue;
sw0 = &user_button_1;
sw1 = &user_button_2;
};
leds {
compatible = "gpio-leds";
user_led1_green: user_led1_green {
gpios = <&gpioa_h 11 GPIO_ACTIVE_LOW>;
label = "User RGB LED1 GREEN";
};
user_led1_blue: user_led1_blue {
gpios = <&gpioe_l 12 GPIO_ACTIVE_LOW>;
label = "User RGB LED1 BLUE";
};
user_led1_red: user_led1_red {
gpios = <&gpioe_l 14 GPIO_ACTIVE_LOW>;
label = "User RGB LED1 RED";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button_1: button_0 {
label = "User SW1";
gpios = <&gpiod_l 15 GPIO_ACTIVE_HIGH>;
};
user_button_2: button_1 {
label = "User SW2";
gpios = <&gpioa_h 9 GPIO_ACTIVE_HIGH>;
};
};
};
&flash0 {
@ -37,3 +75,21 @@
};
};
};
&gpioa_h {
status = "okay";
};
&gpioe_l {
status = "okay";
};
&gpiod_l {
status = "okay";
};
&eirq0 {
pinctrl-0 = <&eirq0_default>;
pinctrl-names = "default";
status = "okay";
};

2
boards/arm/mr_canhubk3/mr_canhubk3.yaml
View file

@ -9,3 +9,5 @@ ram: 1024
flash: 1024
toolchain:
- zephyr
supported:
- gpio

206
dts/arm/nxp/nxp_s32k344_m7.dtsi
View file

@ -80,6 +80,212 @@
#clock-cells = <1>;
status = "okay";
};
siul2: siul2@40290000 {
reg = <0x40290000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
eirq0: eirq@40290010 {
compatible = "nxp,s32-siul2-eirq";
reg = <0x40290010 0x04>, <0x40290018 0x04>;
reg-names = "disr0", "direr0";
interrupts = <53 0>, <54 0>, <55 0>, <56 0>;
interrupt-names = "0_7", "8_15", "16_23", "24_31";
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled";
};
gpioa_l: gpio@40291702 {
compatible = "nxp,s32-gpio";
reg = <0x40291702 0x02>, <0x40290240 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <0 0>, <1 1>, <2 2>, <3 3>, <4 4>,
<5 5>, <6 6>, <7 7>, <8 16>, <9 17>,
<10 18>, <11 19>, <12 20>, <13 21>,
<14 22>, <15 23>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpioa_h: gpio@40291700 {
compatible = "nxp,s32-gpio";
reg = <0x40291700 0x02>, <0x40290280 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <0 4>, <2 0>, <3 1>, <4 2>,
<5 3>, <9 5>, <12 6>, <14 7>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpiob_l: gpio@40291706 {
compatible = "nxp,s32-gpio";
reg = <0x40291706 0x02>, <0x402902c0 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <0 8>, <1 9>, <2 10>, <3 11>, <4 12>,
<5 13>, <8 14>, <9 15>, <10 24>, <11 25>,
<12 26>, <13 27>, <14 28>, <15 29>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
gpio-reserved-ranges = <6 2>;
status = "disabled";
};
gpiob_h: gpio@40291704 {
compatible = "nxp,s32-gpio";
reg = <0x40291704 0x02>, <0x40290300 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <0 30>, <1 31>, <5 8>, <6 9>, <7 10>,
<8 11>, <9 12>, <10 13>, <12 14>, <15 15>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpioc_l: gpio@4029170a {
compatible = "nxp,s32-gpio";
reg = <0x4029170a 0x02>, <0x40290340 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <0 1>, <1 1>, <2 2>, <3 3>, <4 4>,
<5 5>, <6 6>, <7 7>, <8 16>, <9 17>,
<10 18>, <11 19>, <12 20>, <13 21>,
<14 22>, <15 23>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpioc_h: gpio@40291708 {
compatible = "nxp,s32-gpio";
reg = <0x40291708 0x02>, <0x40290380 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <4 16>, <5 17>, <7 18>, <8 19>,
<9 20>, <10 21>, <11 22>, <13 23>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpiod_l: gpio@4029170e {
compatible = "nxp,s32-gpio";
reg = <0x4029170e 0x02>, <0x402903c0 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <0 8>, <1 9>, <2 10>, <3 11>, <4 12>,
<5 13>, <6 14>, <7 15>, <8 24>,
<9 25>, <10 26>, <11 27>, <12 28>,
<13 29>, <14 30>, <15 31>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpiod_h: gpio@4029170c {
compatible = "nxp,s32-gpio";
reg = <0x4029170c 0x02>, <0x40290400 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <1 24>, <4 25>, <5 26>, <6 27>,
<7 28>, <8 29>, <11 30>, <12 31>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpioe_l: gpio@40291712 {
compatible = "nxp,s32-gpio";
reg = <0x40291712 0x02>, <0x40290440 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <0 0>, <1 1>, <2 2>, <3 3>,
<4 4>, <5 5>, <6 6>, <8 7>,
<9 8>, <10 9>, <11 10>, <12 11>,
<13 12>, <14 13>, <15 14>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpioe_h: gpio@40291710 {
compatible = "nxp,s32-gpio";
reg = <0x40291710 0x02>, <0x40290480 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <0 15>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpiof_l: gpio@40291716 {
compatible = "nxp,s32-gpio";
reg = <0x40291716 0x02>, <0x402904c0 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <0 0>, <1 1>, <2 2>, <3 3>,
<4 4>, <5 5>, <6 6>, <7 7>,
<8 16>, <9 17>, <10 18>, <11 19>,
<12 20>, <13 21>, <14 22>, <15 23>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpiof_h: gpio@40291714 {
compatible = "nxp,s32-gpio";
reg = <0x40291714 0x02>, <0x40290500 0x40>;
reg-names = "pgpdo", "mscr";
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpiog_l: gpio@4029171a {
compatible = "nxp,s32-gpio";
reg = <0x4029171a 0x02>, <0x40290540 0x40>;
reg-names = "pgpdo", "mscr";
interrupt-parent = <&eirq0>;
interrupts = <0 8>, <1 9>, <2 10>, <3 11>,
<4 12>, <5 13>, <6 14>, <7 15>,
<8 24>, <9 25>, <10 26>, <11 27>,
<12 28>, <13 29>, <14 30>, <15 31>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
gpiog_h: gpio@40291718 {
compatible = "nxp,s32-gpio";
reg = <0x40291718 0x02>, <0x40290580 0x40>;
reg-names = "pgpdo", "mscr";
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
};
};
};

19
tests/drivers/gpio/gpio_api_1pin/boards/mr_canhubk3.overlay Normal file
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@ -0,0 +1,19 @@
/*
* Copyright 2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
/* Use the blue LED pin for this test because it supports interrupts */
led0 = &user_led1_blue;
};
};
&eirq0_default {
group2 {
pinmux = <PTE12_EIRQ11>;
input-enable;
};
};

21
tests/drivers/gpio/gpio_basic_api/boards/mr_canhubk3.overlay Normal file
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@ -0,0 +1,21 @@
/*
* Copyright 2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
resources {
compatible = "test-gpio-basic-api";
/* Use LPSPI1 MISO/MOSI pins which are also used for spi_loopback test */
out-gpios = <&gpioa_h 13 0>;
in-gpios = <&gpioa_h 14 0>;
};
};
&eirq0_default {
group2 {
pinmux = <PTA30_EIRQ7>;
input-enable;
};
};