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soc: nrf53: Add enabling of LFXO pins (XL1 and XL2)

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Add a Kconfig option (enabled by default) the enables the low-frequency
oscillator (LFXO) functionality on the XL1 and XL2 pins in the nRF53
SoC initialization routine. This cannot be done in the clock control
driver, as it was done so far, because that won't work in a setup where
the application core image does not use the system clock at all.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2020-11-10 15:51:40 +01:00 committed by Carles Cufí
parent 7a579025df
commit 74930b9256
3 changed files with 18 additions and 18 deletions
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17
drivers/clock_control/clock_control_nrf.c
View file

@ -605,23 +605,6 @@ static int clk_init(const struct device *dev)
nrfx_isr, nrfx_power_clock_irq_handler, 0);
irq_enable(DT_INST_IRQN(0));
#if defined(CONFIG_SOC_NRF5340_CPUAPP) && \
!defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
#define PIN_XL1 0
#define PIN_XL2 1
bool ext_clk = IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL) ||
IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING) ||
IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING);
if (ext_clk) {
nrf_gpio_pin_mcu_select(PIN_XL1,
NRF_GPIO_PIN_MCUSEL_PERIPHERAL);
nrf_gpio_pin_mcu_select(PIN_XL2,
NRF_GPIO_PIN_MCUSEL_PERIPHERAL);
}
#endif
nrfx_err = nrfx_clock_init(clock_event_handler);
if (nrfx_err != NRFX_SUCCESS) {
return -EIO;

10
soc/arm/nordic_nrf/nrf53/Kconfig.soc
View file

@ -130,6 +130,16 @@ config SOC_DCDC_NRF53X_HV
help
Enable nRF53 series System on Chip High Voltage DC/DC converter.
config SOC_ENABLE_LFXO
bool "Enable LFXO"
default y
help
Enable the low-frequency oscillator (LFXO) functionality on XL1 and
XL2 pins.
This option must be enabled if either application or network core is
to use the LFXO. Otherwise, XL1 and XL2 pins will behave as regular
GPIOs.
endif # SOC_NRF5340_CPUAPP

9
soc/arm/nordic_nrf/nrf53/soc.c
View file

@ -20,12 +20,16 @@
#include <nrf_erratas.h>
#if defined(CONFIG_SOC_NRF5340_CPUAPP)
#include <hal/nrf_cache.h>
#include <hal/nrf_gpio.h>
#include <hal/nrf_oscillators.h>
#include <hal/nrf_regulators.h>
#elif defined(CONFIG_SOC_NRF5340_CPUNET)
#include <hal/nrf_nvmc.h>
#endif
#define PIN_XL1 0
#define PIN_XL2 1
#ifdef CONFIG_RUNTIME_NMI
extern void z_arm_nmi_init(void);
#define NMI_INIT() z_arm_nmi_init()
@ -60,9 +64,12 @@ static int nordicsemi_nrf53_init(const struct device *arg)
#endif
#if defined(CONFIG_SOC_NRF5340_CPUAPP) && \
!defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
!defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) && \
defined(CONFIG_SOC_ENABLE_LFXO)
nrf_oscillators_lfxo_cap_set(NRF_OSCILLATORS,
NRF_OSCILLATORS_LFXO_CAP_6PF);
nrf_gpio_pin_mcu_select(PIN_XL1, NRF_GPIO_PIN_MCUSEL_PERIPHERAL);
nrf_gpio_pin_mcu_select(PIN_XL2, NRF_GPIO_PIN_MCUSEL_PERIPHERAL);
#endif
#if defined(CONFIG_SOC_DCDC_NRF53X_APP)