From 74f9f866f2385c426437d698eb9bea0ea590f121 Mon Sep 17 00:00:00 2001 From: Grzegorz Swiderski Date: Thu, 14 Mar 2024 08:39:39 +0100 Subject: [PATCH] snippets: Add nordic-ppr-xip This replacement for the `nordic-ppr-ram` snippet does the opposite: enable PPR execution in place from MRAM. Signed-off-by: Grzegorz Swiderski --- snippets/nordic-ppr-xip/README.rst | 12 ++++++++++++ .../boards/nrf54h20dk_nrf54h20_cpuapp.overlay | 17 +++++++++++++++++ snippets/nordic-ppr-xip/nordic-ppr-xip.overlay | 8 ++++++++ snippets/nordic-ppr-xip/snippet.yml | 8 ++++++++ 4 files changed, 45 insertions(+) create mode 100644 snippets/nordic-ppr-xip/README.rst create mode 100644 snippets/nordic-ppr-xip/boards/nrf54h20dk_nrf54h20_cpuapp.overlay create mode 100644 snippets/nordic-ppr-xip/nordic-ppr-xip.overlay create mode 100644 snippets/nordic-ppr-xip/snippet.yml diff --git a/snippets/nordic-ppr-xip/README.rst b/snippets/nordic-ppr-xip/README.rst new file mode 100644 index 0000000000..64977da298 --- /dev/null +++ b/snippets/nordic-ppr-xip/README.rst @@ -0,0 +1,12 @@ +.. _nordic-ppr-xip: + +Nordic boot PPR snippet with execution in place (nordic-ppr-xip) +################################################################ + +Overview +******** + +This snippet allows users to build Zephyr with the capability to boot Nordic PPR +(Peripheral Processor) from another core. PPR code is to be executed from MRAM, +so the PPR image must be built for the ``xip`` board variant, or with +:kconfig:option:`CONFIG_XIP` enabled. diff --git a/snippets/nordic-ppr-xip/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/snippets/nordic-ppr-xip/boards/nrf54h20dk_nrf54h20_cpuapp.overlay new file mode 100644 index 0000000000..4d02921660 --- /dev/null +++ b/snippets/nordic-ppr-xip/boards/nrf54h20dk_nrf54h20_cpuapp.overlay @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor + * SPDX-License-Identifier: Apache-2.0 + */ + +&cpuppr_ram3x_region { + status = "okay"; +}; + +&cpuppr_vpr { + execution-memory = <&cpuppr_code_partition>; + /delete-property/ source-memory; +}; + +&uart135 { + status = "reserved"; +}; diff --git a/snippets/nordic-ppr-xip/nordic-ppr-xip.overlay b/snippets/nordic-ppr-xip/nordic-ppr-xip.overlay new file mode 100644 index 0000000000..e33885fc10 --- /dev/null +++ b/snippets/nordic-ppr-xip/nordic-ppr-xip.overlay @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor + * SPDX-License-Identifier: Apache-2.0 + */ + +&cpuppr_vpr { + status = "okay"; +}; diff --git a/snippets/nordic-ppr-xip/snippet.yml b/snippets/nordic-ppr-xip/snippet.yml new file mode 100644 index 0000000000..4fa136b20e --- /dev/null +++ b/snippets/nordic-ppr-xip/snippet.yml @@ -0,0 +1,8 @@ +name: nordic-ppr-xip +append: + EXTRA_DTC_OVERLAY_FILE: nordic-ppr-xip.overlay + +boards: + nrf54h20dk/nrf54h20/cpuapp: + append: + EXTRA_DTC_OVERLAY_FILE: boards/nrf54h20dk_nrf54h20_cpuapp.overlay