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soc: riscv-privileged: support SoCs without reset vector

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RISCV_PRIVILEGED implicitly depends on INCLUDE_RESET_VECTOR.
Remove that dependency by adding support for SoCs that
do not need the `__reset` stub.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
This commit is contained in:
Marcin Szymczyk 2024-04-03 15:36:59 +02:00 committed by Carles Cufí
parent 030a8b1830
commit 75f5d98002
1 changed files with 5 additions and 0 deletions
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5
soc/common/riscv-privileged/vector.S
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@ -97,5 +97,10 @@ SECTION_FUNC(vectors, __start)
#endif /* CONFIG_RISCV_VECTORED_MODE */ #endif /* CONFIG_RISCV_VECTORED_MODE */
#if CONFIG_INCLUDE_RESET_VECTOR
/* Jump to __reset */ /* Jump to __reset */
tail __reset tail __reset
#else
/* Jump to __initialize */
tail __initialize
#endif