dts: riscv: add basic dts support for new Telink B91 platform
CPU, Power, GPIO, Serial and Pinctrl dtsi support for new Telink B91 RISC-V platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
This commit is contained in:
Yuriy Vynnychek
Christopher Friedt
parent
ed743aaf45
commit
77bd56f9b1
8
dts/bindings/cpu/telink,b91.yaml
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8
dts/bindings/cpu/telink,b91.yaml
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# Copyright (c) 2021 Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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description: Telink RISC-V CPU
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compatible: "telink,b91"
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include: cpu.yaml
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22
dts/bindings/gpio/telink,b91-gpio.yaml
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22
dts/bindings/gpio/telink,b91-gpio.yaml
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# Copyright (c) 2021, Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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description: Telink B91 GPIO node
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compatible: "telink,b91-gpio"
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include: [gpio-controller.yaml, base.yaml]
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properties:
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reg:
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required: true
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label:
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required: true
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"#gpio-cells":
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const: 2
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gpio-cells:
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- pin
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- flags
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29
dts/bindings/pinctrl/telink,b91-pinmux.yaml
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29
dts/bindings/pinctrl/telink,b91-pinmux.yaml
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# Copyright (c) 2021, Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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description: Telink B91 PinMux
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compatible: "telink,b91-pinmux"
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include: base.yaml
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properties:
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reg:
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required: true
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label:
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required: true
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pad-mul-sel:
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type: int
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required: true
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description: PinMux pad_mul_sel register values.
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child-binding:
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description:
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This binding gives a base representation of the Telink B91 pins configration.
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properties:
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pinmux:
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required: true
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type: int
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27
dts/bindings/power/telink,b91-power.yaml
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27
dts/bindings/power/telink,b91-power.yaml
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# Copyright (c) 2021 Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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description: Telink B91 power control node
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compatible: "telink,b91-power"
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include: base.yaml
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properties:
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reg:
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required: true
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power-mode:
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type: string
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required: true
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enum:
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- "LDO_1P4_LDO_1P8"
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- "DCDC_1P4_LDO_1P8"
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- "DCDC_1P4_DCDC_1P8"
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vbat-type:
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type: string
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required: true
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enum:
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- "VBAT_MAX_VALUE_LESS_THAN_3V6"
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- "VBAT_MAX_VALUE_GREATER_THAN_3V6"
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19
dts/bindings/serial/telink,b91-uart.yaml
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19
dts/bindings/serial/telink,b91-uart.yaml
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# Copyright (c) 2021, Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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description: Telink B91 UART
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compatible: "telink,b91-uart"
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include: uart-controller.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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pinctrl-0:
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type: phandles
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required: true
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204
dts/riscv/telink_b91.dtsi
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204
dts/riscv/telink_b91.dtsi
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/*
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* Copyright (c) 2021 Telink Semiconductor
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/pinctrl/b91-pinctrl.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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reg = <0>;
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clock-frequency = <24000000>;
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compatible ="telink,b91", "riscv";
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "telink,telink_b91-soc";
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ranges;
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ram_ilm: memory@0 {
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compatible = "mmio-sram";
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};
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ram_dlm: memory@80000 {
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compatible = "mmio-sram";
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};
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flash_mspi: flash-controller@80140100 {
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compatible = "telink,b91-flash-controller";
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label = "flash_mspi";
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reg = <0x80140100 0x40>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash: flash@20000000 {
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compatible = "soc-nv-flash";
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write-block-size = <1>;
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};
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};
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power: power@80140180 {
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compatible = "telink,b91-power";
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reg = <0x80140180 0x40>;
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power-mode = "LDO_1P4_LDO_1P8";
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vbat-type = "VBAT_MAX_VALUE_GREATER_THAN_3V6";
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status = "okay";
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};
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gpioa: gpio@80140300 {
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compatible = "telink,b91-gpio";
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gpio-controller;
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interrupt-parent = <&plic0>;
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interrupts = <25 1>, <26 1>, <27 1>;
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reg = <0x80140300 0x08>;
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label = "gpio_a";
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status = "disabled";
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#gpio-cells = <2>;
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};
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gpiob: gpio@80140308 {
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compatible = "telink,b91-gpio";
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gpio-controller;
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interrupt-parent = <&plic0>;
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interrupts = <25 1>, <26 1>, <27 1>;
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reg = <0x80140308 0x08>;
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label = "gpio_b";
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status = "disabled";
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#gpio-cells = <2>;
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};
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gpioc: gpio@80140310 {
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compatible = "telink,b91-gpio";
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gpio-controller;
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interrupt-parent = <&plic0>;
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interrupts = <25 1>, <26 1>, <27 1>;
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reg = <0x80140310 0x08>;
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label = "gpio_c";
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status = "disabled";
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#gpio-cells = <2>;
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};
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gpiod: gpio@80140318 {
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compatible = "telink,b91-gpio";
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gpio-controller;
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interrupt-parent = <&plic0>;
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interrupts = <25 1>, <26 1>, <27 1>;
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reg = <0x80140318 0x08>;
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label = "gpio_d";
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status = "disabled";
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#gpio-cells = <2>;
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};
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gpioe: gpio@80140320 {
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compatible = "telink,b91-gpio";
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gpio-controller;
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interrupt-parent = <&plic0>;
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interrupts = <25 1>, <26 1>, <27 1>;
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reg = <0x80140320 0x08>;
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label = "gpio_e";
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status = "disabled";
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#gpio-cells = <2>;
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};
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plic0: interrupt-controller@e4000000 {
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compatible = "sifive,plic-1.0.0";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = < 0xe4000000 0x00001000
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0xe4002000 0x00000800
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0xe4200000 0x00010000 >;
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reg-names = "prio", "irq_en", "reg";
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riscv,max-priority = <3>;
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riscv,ndev = <63>;
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};
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uart0: serial@80140080 {
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compatible = "telink,b91-uart";
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label = "uart_0";
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reg = <0x80140080 0x40>;
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interrupts = <19 1>;
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interrupt-parent = <&plic0>;
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status = "disabled";
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};
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uart1: serial@801400C0 {
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compatible = "telink,b91-uart";
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label = "uart_1";
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reg = <0x801400C0 0x40>;
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interrupts = <18 1>;
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interrupt-parent = <&plic0>;
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status = "disabled";
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};
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pinmux: pinmux@80140330 {
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compatible = "telink,b91-pinmux";
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reg = <0x80140330 0x28
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0x80140306 0x28
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0x0000000e 0x0C>;
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reg-names = "pin_mux",
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"gpio_en",
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"pull_up_en";
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label = "pinmux";
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status = "disabled";
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/* Define UART0 pins: TX(PA3 PB2 PD2), RX(PA4 PB3 PD3) */
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uart0_tx_pa3: uart0_tx_pa3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_A, B91_PIN_3)>;
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};
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uart0_tx_pb2: uart0_tx_pb2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_2)>;
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};
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uart0_tx_pd2: uart0_tx_pd2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_2)>;
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};
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uart0_rx_pa4: uart0_rx_pa4 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_A, B91_PIN_4)>;
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};
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uart0_rx_pb3: uart0_rx_pb3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_3)>;
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};
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uart0_rx_pd3: uart0_rx_pd3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_3)>;
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};
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/* Define UART1 pins: TX(PC6 PD6 PE0), RX(PC7 PD7 PE2) */
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uart1_tx_pc6: uart1_tx_pc6 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_C, B91_PIN_6)>;
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};
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uart1_tx_pd6: uart1_tx_pd6 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_6)>;
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};
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uart1_tx_pe0: uart1_tx_pe0 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_E, B91_PIN_0)>;
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};
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uart1_rx_pc7: uart1_rx_pc7 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_C, B91_PIN_7)>;
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};
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uart1_rx_pd7: uart1_rx_pd7 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_7)>;
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};
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uart1_rx_pe2: uart1_rx_pe2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_E, B91_PIN_2)>;
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};
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};
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};
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};
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