dts: xtensa: esp32xx rework soc/sip list

Introduce dtsi files representing the
current portfolio of chips and modules
based on the followint criteria:

- flash size
- psram size
- gpio count
- certification status

Update the boards dts files according
to which SOC/SIP they are using.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
This commit is contained in:
Marek Matej 2023-06-10 00:25:52 +02:00 committed by Carles Cufí
parent f38e6aa0d1
commit 79869f8abd
65 changed files with 947 additions and 16 deletions

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@ -5,7 +5,7 @@
*/
/dts-v1/;
#include <espressif/esp32.dtsi>
#include <espressif/esp32/esp32_wrover_e_n4r2.dtsi>
#include "esp32-pinctrl.dtsi"
/ {

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@ -5,7 +5,7 @@
*/
/dts-v1/;
#include <espressif/esp32.dtsi>
#include <espressif/esp32/esp32_wrover_e_n4r8.dtsi>
#include "esp32_ethernet_kit-pinctrl.dtsi"
/ {

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@ -5,7 +5,7 @@
*/
/dts-v1/;
#include <espressif/esp32.dtsi>
#include <espressif/esp32/esp32_net.dtsi>
/ {
model = "esp32_net";

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@ -6,7 +6,7 @@
/dts-v1/;
#include <espressif/esp32s2.dtsi>
#include <espressif/esp32s2/esp32s2_wroom.dtsi>
#include "esp32s2_franzininho-pinctrl.dtsi"
/ {

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@ -6,7 +6,7 @@
/dts-v1/;
#include <espressif/esp32s2.dtsi>
#include <espressif/esp32s2/esp32s2_wrover_n4r2.dtsi>
#include "esp32s2_saola-pinctrl.dtsi"
/ {
@ -103,8 +103,10 @@
pinctrl-names = "default";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;

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@ -5,7 +5,7 @@
*/
/dts-v1/;
#include <espressif/esp32s3.dtsi>
#include <espressif/esp32s3/esp32s3_mini_n8.dtsi>
#include "esp32s3_devkitm-pinctrl.dtsi"
/ {

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@ -5,7 +5,7 @@
*/
/dts-v1/;
#include <espressif/esp32.dtsi>
#include <espressif/esp32/esp32_wrover_e_n4r8.dtsi>
#include "esp_wrover_kit-pinctrl.dtsi"
/ {

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@ -5,7 +5,7 @@
*/
/dts-v1/;
#include <espressif/esp32.dtsi>
#include <espressif/esp32/esp32_d0wd_v3.dtsi>
#include "heltec_wifi_lora32_v2-pinctrl.dtsi"
/ {
@ -111,6 +111,11 @@
};
&flash0 {
/* the board is using plain d0wd SoC part without the flash
* so any additional flash size should be defined at the board level
*/
reg = <0x0 DT_SIZE_M(8)>;
status = "okay";
partitions {
compatible = "fixed-partitions";

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@ -5,7 +5,7 @@
*/
/dts-v1/;
#include <espressif/esp32.dtsi>
#include <espressif/esp32/esp32_pico_d4.dtsi>
#include "m5stickc_plus-pinctrl.dtsi"
/ {

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@ -5,7 +5,7 @@
*/
/dts-v1/;
#include "espressif/esp32.dtsi"
#include <espressif/esp32/esp32_wrover_e_n16r4.dtsi>
#include "odroid_go-pinctrl.dtsi"
/ {

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@ -6,7 +6,7 @@
/dts-v1/;
#include <espressif/esp32.dtsi>
#include <espressif/esp32/esp32_wrover_e_n4r2.dtsi>
#include "olimex_esp32_evb-pinctrl.dtsi"
/ {

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@ -6,7 +6,7 @@
/dts-v1/;
#include <espressif/esp32s3.dtsi>
#include <espressif/esp32s3/esp32s3_wroom_n8r8.dtsi>
#include "xiao_esp32s3-pinctrl.dtsi"
#include "seeed_xiao_connector.dtsi"

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@ -129,12 +129,20 @@
flash0: flash@0 {
compatible = "soc-nv-flash";
reg = <0 0x400000>;
erase-block-size = <4096>;
write-block-size = <4>;
/* Flash size is specified in SOC/SIP dtsi */
};
};
psram0: psram@3f800000 {
device_type = "memory";
compatible = "mmio-sram";
/* PSRAM size is specified in SOC/SIP dtsi */
reg = <0x3f800000 DT_SIZE_M(2)>;
status = "disabled";
};
ipm0: ipm@3ffed238 {
compatible = "espressif,esp32-ipm";
reg = <0x3FFED238 0x8>;
@ -243,6 +251,11 @@
reg = <0x3ff44000 0x800>;
interrupts = <GPIO_INTR_SOURCE>;
interrupt-parent = <&intc>;
/* Maximum available pins (per port)
* Actual occupied pins are specified
* on part number dtsi level, using
* the `gpio-reserved-ranges` property.
*/
ngpios = <32>; /* 0..31 */
};

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@ -0,0 +1,14 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <20>,<24>,<28 31>; // NC
};
/* Add flash or psram on board or application level */

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@ -0,0 +1,20 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 10>, // embeddef psram
<11>, // flash CS
<20>,<24>,<28 31>; // NC
};
/* 2MB psram */
&psram0 {
reg = <0x3f800000 DT_SIZE_M(2)>;
status = "okay";
};

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@ -0,0 +1,16 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <20>,<24>,<28 31>; // NC
};
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

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@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 8>,<11>,<16 17>, // embedded flash
<20>, <24>, <28 31>; // NC
};
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

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@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <16 18>,<23>, // limitations
<24>,<28 31>; // NC
};
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

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@ -0,0 +1,24 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 11>, // flash
<24 25>,<28 31>; // NC
};
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};
/* 2MB psram */
&psram0 {
reg = <0x3f800000 DT_SIZE_M(2)>;
status = "okay";
};

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@ -0,0 +1,17 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <20>, <24>, <28 31>;
};
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

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@ -0,0 +1,22 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 11>, // flash
<20>, <24>, <28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 16MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(16)>;
};

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@ -0,0 +1,22 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 11>, // flash
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

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@ -0,0 +1,22 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 11>, // flash
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};

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@ -0,0 +1,23 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <2>,<25>, // NC/test
<6 11>, // flash
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 16MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(16)>;
};

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@ -0,0 +1,23 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <2>,<25>, // NC/test
<6 11>, // flash
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

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@ -0,0 +1,23 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <2>,<25>, // NC/test
<6 11>, // flash
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};

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@ -0,0 +1,28 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 11>,<16 17>, // flash&psram
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 16MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(16)>;
};
/* 2MB psram */
&psram0 {
reg = <0x3f800000 DT_SIZE_M(2)>;
status = "okay";
};

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@ -0,0 +1,28 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 11>,<16 17>, // flash&psram
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 16MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(16)>;
};
/* 4MB psram */
&psram0 {
reg = <0x3f800000 DT_SIZE_M(4)>;
status = "okay";
};

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@ -0,0 +1,28 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 11>,<16 17>, // flash&psram
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 16MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(16)>;
};
/* 8MB psram */
&psram0 {
reg = <0x3f800000 DT_SIZE_M(8)>;
status = "okay";
};

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@ -0,0 +1,28 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 11>,<16 17>, // flash&psram
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};
/* 2MB psram */
&psram0 {
reg = <0x3f800000 DT_SIZE_M(2)>;
status = "okay";
};

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@ -0,0 +1,28 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 11>,<16 17>, // flash&psram
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};
/* 8MB psram */
&psram0 {
reg = <0x3f800000 DT_SIZE_M(8)>;
status = "okay";
};

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@ -0,0 +1,28 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <6 11>,<16 17>, // flash&psram
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};
/* 2MB psram */
&psram0 {
reg = <0x3f800000 DT_SIZE_M(2)>;
status = "okay";
};

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@ -0,0 +1,29 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32_common.dtsi"
/* Reserved GPIO pins */
&gpio0 {
gpio-reserved-ranges = <20>, <24>, <28 31>;
gpio-reserved-ranges = <6 11>,<16 17>, // flash&psram
<20>,<24>,<28 31>; // NC
};
&gpio1 {
gpio-reserved-ranges = <6>,<7>; // GPIO37-38 NC
};
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};
/* 8MB flash */
&psram0 {
reg = <0x3f800000 DT_SIZE_M(8)>;
status = "okay";
};

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@ -0,0 +1,7 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"

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@ -108,12 +108,20 @@
flash0: flash@0 {
compatible = "soc-nv-flash";
reg = <0 0x400000>;
erase-block-size = <4096>;
write-block-size = <4>;
/* Flash size is specified in SOC/SIP dtsi */
};
};
psram0: psram@3f500000 {
device_type = "memory";
compatible = "mmio-sram";
/* PSRAM size is specified in SOC/SIP dtsi */
reg = <0x3f500000 DT_SIZE_M(2)>;
status = "disabled";
};
uart0: uart@3f400000 {
compatible = "espressif,esp32-uart";
reg = <0x3f400000 0x400>;
@ -158,6 +166,11 @@
reg = <0x3f404000 0x800>;
interrupts = <GPIO_INTR_SOURCE>;
interrupt-parent = <&intc>;
/* Maximum available pins (per port)
* Actual occupied pins are specified
* on part number dtsi level, using
* the `gpio-reserved-ranges` property.
*/
ngpios = <32>; /* 0..31 */
};

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@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 2MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(2)>;
};

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@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

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@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};
/* 2MB psram */
&psram0 {
reg = <0x3f500000 DT_SIZE_M(2)>;
status = "okay";
};

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@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

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@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};
/* 2MB psram */
&psram0 {
status = "okay";
reg = <0x3f500000 DT_SIZE_M(2)>;
};

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@ -0,0 +1,13 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 2MB psram */
&psram0 {
status = "okay";
reg = <0x3f500000 DT_SIZE_M(2)>;
};

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@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 16 MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(16)>;
};

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@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

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@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};
/* 2MB psram */
&psram0 {
status = "okay";
reg = <0x3f500000 DT_SIZE_M(2)>;
};

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@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};

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@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

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@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 16MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(16)>;
};
/* 2MB psram */
&psram0 {
status = "okay";
reg = <0x3f500000 DT_SIZE_M(2)>;
};

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@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};
/* 2MB psram */
&psram0 {
status = "okay";
reg = <0x3f500000 DT_SIZE_M(2)>;
};

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@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s2_common.dtsi"
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};
/* 2MB psram */
&psram0 {
status = "okay";
reg = <0x3f500000 DT_SIZE_M(2)>;
};

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@ -0,0 +1,7 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"

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@ -94,9 +94,18 @@
reg = <0 0x800000>;
erase-block-size = <4096>;
write-block-size = <4>;
/* Flash size is specified in SOC/SIP dtsi */
};
};
psram0: psram@3c000000 {
device_type = "memory";
compatible = "mmio-sram";
/* PSRAM size is specified in SOC/SIP dtsi */
reg = <0x3c000000 DT_SIZE_M(2)>;
status = "disabled";
};
uart0: uart@60000000 {
compatible = "espressif,esp32-uart";
reg = <0x60000000 0x1000>;
@ -144,7 +153,12 @@
reg = <0x60004000 0x800>;
interrupts = <GPIO_INTR_SOURCE>;
interrupt-parent = <&intc>;
ngpios = <32>;
/* Maximum available pins (per port)
* Actual occupied pins are specified
* on part number dtsi level, using
* the `gpio-reserved-ranges` property.
*/
ngpios = <32>; /* 0..31 */
};
gpio1: gpio@60004800 {
@ -154,7 +168,7 @@
reg = <0x60004800 0x800>;
interrupts = <GPIO_INTR_SOURCE>;
interrupt-parent = <&intc>;
ngpios = <13>;
ngpios = <22>; /* 32..53 */
};
};

View file

@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};

View file

@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};
/* 2MB psram */
&psram0 {
reg = <0x3c000000 DT_SIZE_M(2)>;
status = "okay";
};

View file

@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};

View file

@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};
/* 2MB psram */
&psram0 {
reg = <0x3c000000 DT_SIZE_M(2)>;
status = "okay";
};

View file

@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};
/* 8MB psram */
&psram0 {
reg = <0x3c000000 DT_SIZE_M(8)>;
status = "okay";
};

View file

@ -0,0 +1,13 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 2MB psram */
&psram0 {
reg = <0x3c000000 DT_SIZE_M(2)>;
status = "okay";
};

View file

@ -0,0 +1,13 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 8MB psram */
&psram0 {
reg = <0x3c000000 DT_SIZE_M(8)>;
status = "okay";
};

View file

@ -0,0 +1,13 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 8MB psram */
&psram0 {
reg = <0x3c000000 DT_SIZE_M(8)>;
status = "okay";
};

View file

@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 16MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(16)>;
};

View file

@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 16MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(16)>;
};
/* 8MB psram */
&psram0 {
reg = <0x3c000000 DT_SIZE_M(8)>;
status = "okay";
};

View file

@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

View file

@ -0,0 +1,18 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};
/* 8MB psram */
&psram0 {
reg = <0x3c000000 DT_SIZE_M(8)>;
status = "okay";
};

View file

@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};

View file

@ -0,0 +1,17 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32s3_common.dtsi"
/* 8MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(8)>;
};
/* 8MB psram */
&psram0 {
reg = <0x3c000000 DT_SIZE_M(8)>;
};