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dts: stm32wb: Limit flash size to 812K

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stm32wb55rg is a dual core SoC (M4/M0) with a radio/protocol stack
running on M0 core. M0 FW starts at flash address 0x80CB000.
So flash size available to zephyr is 812K instead of 1M.
Configure package size to reflect this (flash size is now 812K)
and update MPU setting to exclude M0 FW. From MPU point of view,
we set flash size to 512K since we should chose a size being a power
of 2.
If we consider there will be 2 images partitions in a FOTA scheme,
512 K is beyond image-0 and hence is sufficient to cover application
image.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2019-03-07 17:05:27 +01:00 committed by Anas Nashif
parent d777413b19
commit 79edb8b632
2 changed files with 12 additions and 1 deletions
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2
dts/arm/st/wb/stm32wb55Xg.dtsi
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@ -14,7 +14,7 @@
soc {
flash-controller@58004000 {
flash0: flash@8000000 {
reg = <0x08000000 DT_SIZE_K(1024)>;
reg = <0x08000000 DT_SIZE_K(812)>;
};
};
};

11
soc/arm/st_stm32/common/arm_mpu_mem_cfg.h
View file

@ -10,6 +10,7 @@
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
/* Flash Region Definitions */
#if !defined(CONFIG_SOC_SERIES_STM32WBX)
#if CONFIG_FLASH_SIZE == 64
#define REGION_FLASH_SIZE REGION_64K
#elif CONFIG_FLASH_SIZE == 128
@ -27,6 +28,16 @@
#else
#error "Unsupported configuration"
#endif
#else /* CONFIG_SOC_SERIES_STM32WBX */
/* For STM32WBX SoCs, last 212K are resevred for M0 fw */
/* and should not be covered by zephyr MPU. */
/* So map only the first 512K, which is beyond partition 'image-0' */
#if CONFIG_FLASH_SIZE == 812
#define REGION_FLASH_SIZE REGION_1M
#else
#error "Unsupported configuration"
#endif
#endif /* CONFIG_SOC_SERIES_STM32WBX */
/* SRAM Region Definitions */
#if CONFIG_SRAM_SIZE == 12