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arch: riscv: added support for custom initialization of gp register

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Plus added implementation for esp32c3 SoC.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
This commit is contained in:
Felipe Neves 2021-06-14 11:10:47 -03:00 committed by Anas Nashif
parent 5d736766ed
commit 7b09d031fa
4 changed files with 18 additions and 0 deletions
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6
arch/riscv/Kconfig
View file

@ -90,6 +90,12 @@ config RISCV_SOC_INTERRUPT_INIT
Enable SOC-based interrupt initialization
(call soc_interrupt_init, within _IntLibInit when enabled)
config RISCV_SOC_INIT_GP_VALUE
bool "Enable SOC-based global pointer register initialization"
help
Enable SOC-based pointer register initialization
(call __soc_get_gp_initial_value when initializing a thread)
config RISCV_GENERIC_TOOLCHAIN
bool "Compile using generic riscv32 toolchain"
default y

4
arch/riscv/core/thread.c
View file

@ -47,6 +47,10 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
stack_init->a2 = (ulong_t)p2;
stack_init->a3 = (ulong_t)p3;
#ifdef CONFIG_RISCV_SOC_INIT_GP_VALUE
stack_init->gp = __soc_get_gp_initial_value();
#endif
#ifdef CONFIG_THREAD_LOCAL_STORAGE
stack_init->tp = (ulong_t)thread->tls;
#endif

6
soc/riscv/esp32c3/soc.c
View file

@ -181,3 +181,9 @@ int arch_irq_is_enabled(unsigned int irq)
{
return (esprv_intc_get_interrupt_unmask() & (1 << irq));
}
ulong_t __soc_get_gp_initial_value(void)
{
extern uint32_t __global_pointer$;
return (ulong_t)&__global_pointer$;
}

2
soc/riscv/esp32c3/soc.h
View file

@ -41,6 +41,8 @@ extern STATUS esp32c3_rom_uart_tx_one_char(uint8_t chr);
extern STATUS esp32c3_rom_uart_rx_one_char(uint8_t *chr);
extern void esp32c3_rom_ets_set_user_start(uint32_t start);
ulong_t __soc_get_gp_initial_value(void);
#endif /* _ASMLANGUAGE */
#endif /* __SOC_H__ */