mmu: support only identity RAM mapping
We no longer plan to support a split address space with the kernel in high memory and per-process address spaces. Because of this, we can simplify some things. System RAM is now always identity mapped at boot. We no longer require any virtual-to-physical translation for page tables, and can remove the dual-mapping logic from the page table generation script since we won't need to transition the instruction point off of physical addresses. CONFIG_KERNEL_VM_BASE and CONFIG_KERNEL_VM_LIMIT have been removed. The kernel's address space always starts at CONFIG_SRAM_BASE_ADDRESS, of a fixed size specified by CONFIG_KERNEL_VM_SIZE. Driver MMIOs and other uses of k_mem_map() are still virtually mapped, and the later introduction of demand paging will result in only a subset of system RAM being a fixed identity mapping instead of all of it. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie
Anas Nashif
parent
ce29baa0ef
commit
7d32e9f9a5
42
arch/Kconfig
42
arch/Kconfig
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@ -534,43 +534,17 @@ config SRAM_REGION_PERMISSIONS
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If not enabled, all SRAM mappings will allow supervisor mode to
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read, write, and execute. User mode support requires this.
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config KERNEL_VM_BASE
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hex "Base virtual address for the kernel"
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default SRAM_BASE_ADDRESS if X86 # TODO remove once x86 is linked properly
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default 0xFFFF800000000000 if 64BIT
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config KERNEL_VM_SIZE
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hex "Size of kernel address space in bytes"
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default 0xC0000000
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help
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Define the base virtual memory address for the core kernel. There will
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be a permemant mapping of all RAM starting at this virtual address,
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with any unused space up to the KERNEL_VM_LIMIT available for memory
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mappings. This denotes the start of the RAM mapping and may not be
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the base address of the kernel itself, but the offset of the kernel here
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will be the same as the offset from the beginning of physical memory
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where it was loaded.
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Size of the kernel's address space. Constraining this helps control
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how much total memory can be used for page tables.
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The value here must have similar alignment to the base physical address,
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such that the same page tables can be mapped to the top-level paging
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structure entries for the virtual and physical address.
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It is valid to set this to SRAM_BASE_ADDRESS, in which case RAM will
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be identity-mapped. Otherwise, the SRAM and KERNEL_VM regions must
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not overlap.
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The default for 64-bit presumes a 48-bit canonical address space.
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config KERNEL_VM_LIMIT
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hex "Upper bound on kernel address space"
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default 0xFFFFFFFFFFFFFFFF if 64BIT
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default 0xFFFFFFFF
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help
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Inclusive upper bound on the virtual memory area reserved for the kernel.
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No mappings will be made past this point. Constraining this helps control
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how much memory is used for page tables.
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The area defined by KERNEL_VM_BASE to KERNEL_VM_LIMIT must have enough
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room to map system RAM, plus any driver mappings. Further mappings
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may be made at runtime depending on configuration options (such as
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memory-mapping stacks, VDSO pages, etc).
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The area defined by SRAM_BASE_ADDRESS to SRAM_BASE_ADDRESS +
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KERNEL_VM_SIZE must have enough room to map system RAM, plus any driver
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mappings. Further mappings may be made at runtime depending on
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configuration options (such as memory-mapping stacks, VDSO pages, etc).
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endif # MMU
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@ -173,7 +173,7 @@ static inline uintptr_t get_cr3(const z_arch_esf_t *esf)
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static inline pentry_t *get_ptables(const z_arch_esf_t *esf)
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{
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return z_mem_virt_addr(get_cr3(esf));
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return (pentry_t *)get_cr3(esf);
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}
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#ifdef CONFIG_X86_64
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@ -16,7 +16,6 @@
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#include <kernel_arch_data.h>
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#include <arch/cpu.h>
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#include <arch/x86/multiboot.h>
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#include <sys/mem_manage.h>
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/* exports (private APIs) */
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@ -42,55 +41,7 @@
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GTEXT(_sys_resume_from_deep_sleep)
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#endif
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.macro install_page_tables
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#ifdef CONFIG_X86_MMU
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/* Enable paging. If virtual memory is enabled, the instruction pointer
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* is currently at a physical address. There is an identity mapping
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* for all RAM, plus a virtual mapping of RAM starting at
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* CONFIG_KERNEL_VM_BASE using the same paging structures.
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*
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* Until we enable these page tables, only physical memory addresses
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* work.
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*/
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movl $Z_MEM_PHYS_ADDR(z_x86_kernel_ptables), %eax
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movl %eax, %cr3
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#ifdef CONFIG_X86_PAE
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/* Enable PAE */
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movl %cr4, %eax
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orl $CR4_PAE, %eax
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movl %eax, %cr4
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/* IA32_EFER NXE bit set */
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movl $0xC0000080, %ecx
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rdmsr
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orl $0x800, %eax
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wrmsr
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#endif /* CONFIG_X86_PAE */
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/* Enable paging (CR0.PG, bit 31) / write protect (CR0.WP, bit 16) */
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movl %cr0, %eax
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orl $(CR0_PG | CR0_WP), %eax
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movl %eax, %cr0
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#if CONFIG_KERNEL_VM_BASE != CONFIG_SRAM_BASE_ADDRESS
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/* Jump to a virtual address, which works because the identity and
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* virtual mappings both are to the same physical address.
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*/
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lea vm_enter, %eax
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jmp *%eax
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vm_enter:
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/* We are now executing in virtual memory. We'll un-map the identity
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* mappings later once we are in the C domain
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*/
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#endif /* CONFIG_KERNEL_VM_BASE != CONFIG_SRAM_BASE_ADDRESS */
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#endif /* CONFIG_X86_MMU */
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.endm
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SECTION_FUNC(TEXT_START, __start)
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#ifndef CONFIG_XIP
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install_page_tables
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#endif /* CONFIG_XIP */
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#include "../common.S"
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@ -249,11 +200,6 @@ __csSet:
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call _x86_data_copy
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#endif /* CONFIG_USERSPACE */
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/* Have to do this here, the page tables aren't loaded into RAM
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* until after the data copy
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*/
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install_page_tables
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#endif /* CONFIG_XIP */
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/*
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@ -283,6 +229,30 @@ __csSet:
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#endif
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lidt z_x86_idt /* load 32-bit operand size IDT */
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#ifdef CONFIG_X86_MMU
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/* Install page tables */
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movl $z_x86_kernel_ptables, %eax
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movl %eax, %cr3
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#ifdef CONFIG_X86_PAE
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/* Enable PAE */
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movl %cr4, %eax
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orl $CR4_PAE, %eax
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movl %eax, %cr4
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/* IA32_EFER NXE bit set */
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movl $0xC0000080, %ecx
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rdmsr
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orl $0x800, %eax
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wrmsr
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#endif /* CONFIG_X86_PAE */
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/* Enable paging (CR0.PG, bit 31) / write protect (CR0.WP, bit 16) */
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movl %cr0, %eax
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orl $(CR0_PG | CR0_WP), %eax
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movl %eax, %cr0
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#endif /* CONFIG_X86_MMU */
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#ifdef CONFIG_LOAPIC
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/* For BSP, cpu_number is 0 */
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xorl %eax, %eax
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@ -151,7 +151,7 @@ struct task_state_segment _df_tss = {
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.es = DATA_SEG,
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.ss = DATA_SEG,
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.eip = (uint32_t)df_handler_top,
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.cr3 = Z_MEM_PHYS_ADDR((uint32_t)&z_x86_kernel_ptables)
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.cr3 = (uint32_t)&z_x86_kernel_ptables
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};
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static __used void df_handler_bottom(void)
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@ -199,7 +199,7 @@ static FUNC_NORETURN __used void df_handler_top(void)
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_main_tss.es = DATA_SEG;
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_main_tss.ss = DATA_SEG;
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_main_tss.eip = (uint32_t)df_handler_bottom;
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_main_tss.cr3 = z_mem_phys_addr(&z_x86_kernel_ptables);
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_main_tss.cr3 = (uint32_t)(&z_x86_kernel_ptables);
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_main_tss.eflags = 0U;
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/* NT bit is set in EFLAGS so we will task switch back to _main_tss
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@ -50,7 +50,7 @@ SECTION_FUNC(TEXT, z_x86_trampoline_to_kernel)
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pushl %edi
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/* Switch to kernel page table */
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movl $Z_MEM_PHYS_ADDR(z_x86_kernel_ptables), %esi
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movl $z_x86_kernel_ptables, %esi
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movl %esi, %cr3
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/* Save old trampoline stack pointer in %edi */
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@ -155,7 +155,7 @@ SECTION_FUNC(TEXT, z_x86_syscall_entry_stub)
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pushl %edi
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/* Switch to kernel page table */
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movl $Z_MEM_PHYS_ADDR(z_x86_kernel_ptables), %esi
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movl $z_x86_kernel_ptables, %esi
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movl %esi, %cr3
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/* Save old trampoline stack pointer in %edi */
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@ -49,7 +49,7 @@
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clts
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/* Page tables created at build time by gen_mmu.py */
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movl $Z_MEM_PHYS_ADDR(z_x86_kernel_ptables), %eax
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movl $z_x86_kernel_ptables, %eax
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movl %eax, %cr3
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set_efer
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@ -70,7 +70,7 @@
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movq %rax, %cr4
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clts
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movq $Z_MEM_PHYS_ADDR(z_x86_kernel_ptables), %rax
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movq $z_x86_kernel_ptables, %rax
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movq %rax, %cr3
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set_efer
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@ -84,7 +84,7 @@ z_x86_syscall_entry_stub:
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/* Load kernel's page table */
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pushq %rax
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movq $Z_MEM_PHYS_ADDR(z_x86_kernel_ptables), %rax
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movq $z_x86_kernel_ptables, %rax
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movq %rax, %cr3
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popq %rax
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movq $0, -8(%rsp) /* Delete stashed RAX data */
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@ -26,10 +26,6 @@ FUNC_NORETURN void z_x86_prep_c(void *arg)
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z_x86_early_serial_init();
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#endif
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#ifdef CONFIG_MMU
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z_x86_mmu_init();
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#endif
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#ifdef CONFIG_X86_64
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x86_64_irq_init();
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#endif
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@ -100,7 +100,7 @@ void *z_x86_userspace_prepare_thread(struct k_thread *thread)
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z_x86_thread_pt_init(thread);
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initial_entry = drop_to_user;
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} else {
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thread->arch.ptables = z_mem_phys_addr(&z_x86_kernel_ptables);
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thread->arch.ptables = (uintptr_t)&z_x86_kernel_ptables;
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initial_entry = z_thread_entry;
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}
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@ -141,14 +141,6 @@ static const struct paging_level paging_levels[] = {
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* Utility functions
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*/
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/* For a physical address, return its permanent virtual mapping in the kernel's
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* address space
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*/
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static inline void *ram_phys_to_virt(uintptr_t phys)
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{
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return (void *)(phys + Z_MEM_VM_OFFSET);
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}
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/* For a table at a particular level, get the entry index that corresponds to
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* the provided virtual address
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*/
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@ -177,7 +169,7 @@ static inline uintptr_t get_entry_phys(pentry_t entry, int level)
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/* Return the virtual address of a linked table stored in the provided entry */
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static inline pentry_t *next_table(pentry_t entry, int level)
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{
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return ram_phys_to_virt(get_entry_phys(entry, level));
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return (pentry_t *)(get_entry_phys(entry, level));
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}
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/* 4K for everything except PAE PDPTs */
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@ -324,12 +316,9 @@ static void print_entries(pentry_t entries_array[], uint8_t *base, int level,
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if (phys == virt) {
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/* Identity mappings */
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COLOR(YELLOW);
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} else if (phys + Z_MEM_VM_OFFSET == virt) {
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/* Permanent ram mappings */
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COLOR(GREEN);
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} else {
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/* general mapped pages */
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COLOR(CYAN);
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/* Other mappings */
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COLOR(GREEN);
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}
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} else {
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COLOR(MAGENTA);
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@ -364,8 +353,7 @@ static void dump_ptables(pentry_t *table, uint8_t *base, int level)
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}
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#endif
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printk("%s at %p (0x%" PRIxPTR ") ", info->name, table,
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z_mem_phys_addr(table));
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printk("%s at %p: ", info->name, table);
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if (level == 0) {
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printk("entire address space\n");
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} else {
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@ -598,7 +586,7 @@ static int page_map_set(pentry_t *ptables, void *virt, pentry_t entry_val,
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if (new_table == NULL) {
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return -ENOMEM;
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}
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*entryp = z_mem_phys_addr(new_table) | INT_FLAGS;
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*entryp = ((uintptr_t)new_table) | INT_FLAGS;
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table = new_table;
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} else {
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/* We fail an assertion here due to no support for
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@ -694,42 +682,6 @@ int arch_mem_map(void *virt, uintptr_t phys, size_t size, uint32_t flags)
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return 0;
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}
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static void identity_map_remove(void)
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{
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#if CONFIG_SRAM_BASE_ADDRESS != CONFIG_KERNEL_VM_BASE
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size_t size, scope = get_entry_scope(0);
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uint8_t *pos;
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k_mem_region_align((uintptr_t *)&pos, &size,
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(uintptr_t)CONFIG_SRAM_BASE_ADDRESS,
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(size_t)CONFIG_SRAM_SIZE * 1024U, scope);
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/* We booted with RAM mapped both to its identity and virtual
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* mapping starting at CONFIG_KERNEL_VM_BASE. This was done by
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* double-linking the relevant tables in the top-level table.
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* At this point we don't need the identity mapping(s) any more,
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* zero the top-level table entries corresponding to the
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* physical mapping.
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*/
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while (size) {
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pentry_t *entry = get_entry_ptr(&z_x86_kernel_ptables, pos, 0);
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/* set_pte */
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*entry = 0;
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pos += scope;
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size -= scope;
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}
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#endif
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}
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/* Invoked to remove the identity mappings in the page tables,
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* they were only needed to tranisition the instruction pointer at early boot
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*/
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void z_x86_mmu_init(void)
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{
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identity_map_remove();
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}
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#if CONFIG_X86_STACK_PROTECTION
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/* Legacy stack guard function. This will eventually be replaced in favor
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* of memory-mapping stacks (with a non-present mapping immediately below each
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@ -737,7 +689,7 @@ void z_x86_mmu_init(void)
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*/
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static void stack_guard_set(void *guard_page)
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{
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pentry_t pte = z_mem_phys_addr(guard_page) | MMU_P | MMU_XD;
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pentry_t pte = ((uintptr_t)guard_page) | MMU_P | MMU_XD;
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int ret;
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assert_virt_addr_aligned(guard_page);
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@ -859,7 +811,7 @@ static void *thread_page_pool_get(void *context)
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return ret;
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}
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#define RAM_BASE ((uintptr_t)CONFIG_KERNEL_VM_BASE)
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#define RAM_BASE ((uintptr_t)CONFIG_SRAM_BASE_ADDRESS)
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#define RAM_END (RAM_BASE + (CONFIG_SRAM_SIZE * 1024UL))
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/* Establish a mapping in the thread's page tables */
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@ -889,7 +841,7 @@ static void thread_map(struct k_thread *thread, void *ptr, size_t size,
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/* L1TF */
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pte = 0U;
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} else {
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pte = z_mem_phys_addr(pos) | flags;
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pte = ((uintptr_t)pos) | flags;
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}
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ret = page_map_set(ptables, pos, pte, thread_page_pool_get,
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@ -1043,7 +995,7 @@ static void setup_thread_tables(struct k_thread *thread,
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(void)memcpy(user_table, master_table,
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table_size(level));
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*link = z_mem_phys_addr(user_table) | INT_FLAGS;
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*link = ((pentry_t)user_table) | INT_FLAGS;
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}
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}
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}
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@ -1080,7 +1032,7 @@ void z_x86_thread_pt_init(struct k_thread *thread)
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ptables = (pentry_t *)&header->kernel_data.ptables;
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#endif
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thread->arch.ptables = z_mem_phys_addr(ptables);
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thread->arch.ptables = ((uintptr_t)ptables);
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setup_thread_tables(thread, ptables);
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@ -29,25 +29,6 @@ vary:
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- On x86_64, the _locore region will have Present set and
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the _lorodata region will have Present and Execute Disable set.
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This script will establish a dual mapping at the address defined by
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CONFIG_KERNEL_VM_BASE if it is not the same as CONFIG_SRAM_BASE_ADDRESS.
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- The double-mapping is used to transition the
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instruction pointer from a physical address at early boot to the
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virtual address where the kernel is actually linked.
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- The mapping is always double-mapped at the top-level paging structure
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and the physical/virtual base addresses must have the same alignment
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with respect to the scope of top-level paging structure entries.
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This allows the same second-level paging structure(s) to be used for
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both memory bases.
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- The double-mapping is needed so that we can still fetch instructions
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from identity-mapped physical addresses after we program this table
|
||||
into the MMU, then jump to the equivalent virtual address.
|
||||
The kernel then unlinks the identity mapping before continuing,
|
||||
the address space is purely virtual after that.
|
||||
|
||||
Because the set of page tables are linked together by physical address,
|
||||
we must know a priori the physical address of each table. The linker
|
||||
script must define a z_x86_pagetables_start symbol where the page
|
||||
|
|
@ -72,7 +53,6 @@ import argparse
|
|||
import os
|
||||
import struct
|
||||
import elftools
|
||||
import math
|
||||
from distutils.version import LooseVersion
|
||||
from elftools.elf.elffile import ELFFile
|
||||
from elftools.elf.sections import SymbolTableSection
|
||||
|
|
@ -330,61 +310,21 @@ class PtableSet(object):
|
|||
# Set up entry in leaf page table
|
||||
table.map(virt_addr, phys_addr, flags)
|
||||
|
||||
def map(self, phys_base, virt_base, size, flags):
|
||||
def map(self, phys_base, size, flags):
|
||||
"""Identity map an address range in the page tables, with provided
|
||||
access flags.
|
||||
|
||||
If the virt_base argument is not the same address as phys_base,
|
||||
the same memory will be double mapped to the virt_base address.
|
||||
"""
|
||||
debug("Identity-mapping 0x%x (%d): %s" %
|
||||
(phys_base, size, dump_flags(flags)))
|
||||
|
||||
skip_vm_map = virt_base is None or virt_base == phys_base
|
||||
|
||||
align_check(phys_base, size)
|
||||
for addr in range(phys_base, phys_base + size, 4096):
|
||||
if addr == 0 and skip_vm_map:
|
||||
if addr == 0:
|
||||
# Never map the NULL page
|
||||
continue
|
||||
|
||||
self.map_page(addr, addr, flags)
|
||||
|
||||
if skip_vm_map:
|
||||
return
|
||||
|
||||
# Find how much VM a top-level entry covers
|
||||
scope = 1 << self.toplevel.addr_shift
|
||||
debug("Double map %s entries with scope 0x%x" %
|
||||
(self.toplevel.__class__.__name__, scope))
|
||||
|
||||
# Round bases down to the entry granularity
|
||||
pd_virt_base = math.floor(virt_base / scope) * scope
|
||||
pd_phys_base = math.floor(phys_base / scope) * scope
|
||||
size = size + (phys_base - pd_phys_base)
|
||||
|
||||
# The base addresses have to line up such that they can be mapped
|
||||
# by the same second-level table
|
||||
if phys_base - pd_phys_base != virt_base - pd_virt_base:
|
||||
error("mis-aligned virtual 0x%x and physical base addresses 0x%x" %
|
||||
(virt_base, phys_base))
|
||||
|
||||
# Round size up to entry granularity
|
||||
size = math.ceil(size / scope) * scope
|
||||
|
||||
for offset in range(0, size, scope):
|
||||
cur_virt = pd_virt_base + offset
|
||||
cur_phys = pd_phys_base + offset
|
||||
|
||||
# Get the physical address of the second-level table that identity
|
||||
# maps the current chunk of physical memory
|
||||
table_link_phys = self.toplevel.lookup(cur_phys)
|
||||
|
||||
debug("copy mappings 0x%x - 0x%x to 0x%x, using table 0x%x" %
|
||||
(cur_phys, cur_phys + scope - 1, cur_virt, table_link_phys))
|
||||
|
||||
# Link that to the entry for the virtual mapping
|
||||
self.toplevel.map(cur_virt, table_link_phys, INT_FLAGS)
|
||||
|
||||
def set_region_perms(self, name, flags):
|
||||
"""Set access permissions for a named region that is already mapped
|
||||
|
||||
|
|
@ -488,17 +428,13 @@ def main():
|
|||
debug("building %s" % pclass.__name__)
|
||||
|
||||
ram_base = syms["CONFIG_SRAM_BASE_ADDRESS"]
|
||||
virt_base = syms["CONFIG_KERNEL_VM_BASE"]
|
||||
ram_size = syms["CONFIG_SRAM_SIZE"] * 1024
|
||||
ptables_virt = syms["z_x86_pagetables_start"]
|
||||
ptables_phys = syms["z_x86_pagetables_start"]
|
||||
|
||||
debug("Base addresses: physical 0x%x virtual 0x%x size %d" %
|
||||
(ram_base, virt_base, ram_size))
|
||||
debug("Base addresses: physical 0x%x size %d" % (ram_base, ram_size))
|
||||
|
||||
is_perm_regions = isdef("CONFIG_SRAM_REGION_PERMISSIONS")
|
||||
|
||||
ptables_phys = ptables_virt - (virt_base - ram_base)
|
||||
|
||||
if is_perm_regions:
|
||||
# Don't allow execution by default for any pages. We'll adjust this
|
||||
# in later calls to pt.set_region_perms()
|
||||
|
|
@ -507,14 +443,11 @@ def main():
|
|||
map_flags = FLAG_P
|
||||
|
||||
pt = pclass(ptables_phys)
|
||||
pt.map(ram_base, virt_base, ram_size, map_flags | FLAG_RW)
|
||||
pt.map(ram_base, ram_size, map_flags | FLAG_RW)
|
||||
|
||||
if isdef("CONFIG_XIP"):
|
||||
if virt_base != ram_base:
|
||||
error("XIP and virtual memory are currently incompatible")
|
||||
|
||||
# Additionally identity-map all ROM as read-only
|
||||
pt.map(syms["CONFIG_FLASH_BASE_ADDRESS"], None,
|
||||
pt.map(syms["CONFIG_FLASH_BASE_ADDRESS"],
|
||||
syms["CONFIG_FLASH_SIZE"] * 1024, map_flags)
|
||||
|
||||
# Adjust mapped region permissions if configured
|
||||
|
|
|
|||
|
|
@ -141,7 +141,7 @@ static inline uintptr_t z_x86_cr3_get(void)
|
|||
/* Return the virtual address of the page tables installed in this CPU in CR3 */
|
||||
static inline pentry_t *z_x86_page_tables_get(void)
|
||||
{
|
||||
return z_mem_virt_addr(z_x86_cr3_get());
|
||||
return (pentry_t *)z_x86_cr3_get();
|
||||
}
|
||||
|
||||
/* Kernel's page table. This is in CR3 for all supervisor threads.
|
||||
|
|
@ -153,12 +153,9 @@ extern pentry_t z_x86_kernel_ptables;
|
|||
static inline pentry_t *z_x86_thread_page_tables_get(struct k_thread *thread)
|
||||
{
|
||||
#ifdef CONFIG_USERSPACE
|
||||
return z_mem_virt_addr(thread->arch.ptables);
|
||||
return (pentry_t *)(thread->arch.ptables);
|
||||
#else
|
||||
return &z_x86_kernel_ptables;
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Early-boot paging setup tasks, called from prep_c */
|
||||
void z_x86_mmu_init(void);
|
||||
#endif /* ZEPHYR_ARCH_X86_INCLUDE_X86_MMU_H */
|
||||
|
|
|
|||
|
|
@ -38,26 +38,6 @@
|
|||
/** Region will be accessible to user mode (normally supervisor-only) */
|
||||
#define K_MEM_PERM_USER BIT(5)
|
||||
|
||||
/*
|
||||
* This is the offset to subtract from a virtual address mapped in the
|
||||
* kernel's permanent mapping of RAM, to obtain its physical address.
|
||||
*
|
||||
* virt_addr - Z_VM_OFFSET = phys_addr
|
||||
*
|
||||
* This only works for virtual addresses within the interval
|
||||
* [CONFIG_KERNEL_VM_BASE, CONFIG_KERNEL_VM_BASE + (CONFIG_SRAM_SIZE * 1024)).
|
||||
*
|
||||
* These macros are intended for assembly, linker code, and static initializers.
|
||||
* Use with care.
|
||||
*/
|
||||
#ifdef CONFIG_MMU
|
||||
#define Z_MEM_VM_OFFSET (CONFIG_KERNEL_VM_BASE - CONFIG_SRAM_BASE_ADDRESS)
|
||||
#else
|
||||
#define Z_MEM_VM_OFFSET 0
|
||||
#endif
|
||||
#define Z_MEM_PHYS_ADDR(virt) ((virt) - Z_MEM_VM_OFFSET)
|
||||
#define Z_MEM_VIRT_ADDR(phys) ((phys) + Z_MEM_VM_OFFSET)
|
||||
|
||||
#ifndef _ASMLANGUAGE
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
|
|
@ -123,38 +103,6 @@ void k_mem_map(uint8_t **linear_addr, uintptr_t phys_addr, size_t size,
|
|||
size_t k_mem_region_align(uintptr_t *aligned_addr, size_t *aligned_size,
|
||||
uintptr_t addr, size_t size, size_t align);
|
||||
|
||||
/* Just like Z_MEM_PHYS_ADDR() but with type safety and assertions */
|
||||
static inline uintptr_t z_mem_phys_addr(void *virt)
|
||||
{
|
||||
uintptr_t addr = (uintptr_t)virt;
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
__ASSERT((addr >= CONFIG_KERNEL_VM_BASE) &&
|
||||
(addr < (CONFIG_KERNEL_VM_BASE + (CONFIG_SRAM_SIZE * 1024UL))),
|
||||
"address %p not in permanent mappings", virt);
|
||||
#else
|
||||
/* Should be identity-mapped */
|
||||
__ASSERT((addr >= CONFIG_SRAM_BASE_ADDRESS) &&
|
||||
(addr < (CONFIG_SRAM_BASE_ADDRESS +
|
||||
(CONFIG_SRAM_SIZE * 1024UL))),
|
||||
"physical address 0x%lx not in RAM",
|
||||
(unsigned long)addr);
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
return Z_MEM_PHYS_ADDR(addr);
|
||||
}
|
||||
|
||||
/* Just like Z_MEM_VIRT_ADDR() but with type safety and assertions */
|
||||
static inline void *z_mem_virt_addr(uintptr_t phys)
|
||||
{
|
||||
__ASSERT((phys >= CONFIG_SRAM_BASE_ADDRESS) &&
|
||||
(phys < (CONFIG_SRAM_BASE_ADDRESS +
|
||||
(CONFIG_SRAM_SIZE * 1024UL))),
|
||||
"physical address 0x%lx not in RAM", (unsigned long)phys);
|
||||
|
||||
return (void *)Z_MEM_VIRT_ADDR(phys);
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
25
kernel/mmu.c
25
kernel/mmu.c
|
|
@ -20,15 +20,15 @@ LOG_MODULE_DECLARE(os);
|
|||
static struct k_spinlock mm_lock;
|
||||
|
||||
/*
|
||||
* Overall virtual memory map:
|
||||
* Overall virtual memory map. System RAM is identity-mapped:
|
||||
*
|
||||
* +--------------+ <- CONFIG_KERNEL_VM_BASE
|
||||
* +--------------+ <- CONFIG_SRAM_BASE_ADDRESS
|
||||
* | Mapping for |
|
||||
* | all RAM |
|
||||
* | |
|
||||
* | |
|
||||
* +--------------+ <- mapping_limit
|
||||
* | Available |
|
||||
* +--------------+ <- CONFIG_SRAM_BASE_ADDRESS + CONFIG_SRAM_SIZE
|
||||
* | Available | also the mapping limit as mappings grown downward
|
||||
* | virtual mem |
|
||||
* | |
|
||||
* |..............| <- mapping_pos (grows downward as more mappings are made)
|
||||
|
|
@ -39,7 +39,7 @@ static struct k_spinlock mm_lock;
|
|||
* | ... |
|
||||
* +--------------+
|
||||
* | Mapping |
|
||||
* +--------------+ <- CONFIG_KERNEL_VM_LIMIT
|
||||
* +--------------+ <- CONFIG_SRAM_BASE_ADDRESS + CONFIG_KERNEL_VM_SIZE
|
||||
*
|
||||
* At the moment we just have one area for mappings and they are permanent.
|
||||
* This is under heavy development and may change.
|
||||
|
|
@ -50,16 +50,21 @@ static struct k_spinlock mm_lock;
|
|||
* k_mem_map() mappings start at the end of the address space, and grow
|
||||
* downward.
|
||||
*
|
||||
* The Kconfig value is inclusive so add one, even if it wraps around to 0.
|
||||
* TODO: If we ever encounter a board with RAM in high enough memory
|
||||
* such that there isn't room in the address space, define mapping_pos
|
||||
* and mapping_limit such that we have mappings grow downward from the
|
||||
* beginning of system RAM.
|
||||
*/
|
||||
static uint8_t *mapping_pos =
|
||||
(uint8_t *)((uintptr_t)CONFIG_KERNEL_VM_LIMIT + 1UL);
|
||||
(uint8_t *)((uintptr_t)(CONFIG_SRAM_BASE_ADDRESS +
|
||||
CONFIG_KERNEL_VM_SIZE));
|
||||
|
||||
/* Lower-limit of virtual address mapping. Immediately below this is the
|
||||
* permanent mapping for all SRAM.
|
||||
* permanent identity mapping for all SRAM.
|
||||
*/
|
||||
static uint8_t *mapping_limit = (uint8_t *)((uintptr_t)CONFIG_KERNEL_VM_BASE +
|
||||
KB((size_t)CONFIG_SRAM_SIZE));
|
||||
static uint8_t *mapping_limit =
|
||||
(uint8_t *)((uintptr_t)CONFIG_SRAM_BASE_ADDRESS +
|
||||
KB((size_t)CONFIG_SRAM_SIZE));
|
||||
|
||||
size_t k_mem_region_align(uintptr_t *aligned_addr, size_t *aligned_size,
|
||||
uintptr_t phys_addr, size_t size, size_t align)
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
#include <x86_mmu.h>
|
||||
#include <linker/linker-defs.h>
|
||||
|
||||
#define VM_BASE ((uint8_t *)CONFIG_KERNEL_VM_BASE)
|
||||
#define VM_BASE ((uint8_t *)CONFIG_SRAM_BASE_ADDRESS)
|
||||
#define VM_LIMIT (VM_BASE + KB((size_t)CONFIG_SRAM_SIZE))
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@ void test_k_mem_map_rw(void)
|
|||
expect_fault = false;
|
||||
|
||||
/* Map in a page that allows writes */
|
||||
k_mem_map(&mapped_rw, Z_MEM_PHYS_ADDR((uintptr_t)buf),
|
||||
k_mem_map(&mapped_rw, (uintptr_t)buf,
|
||||
BUF_SIZE, BASE_FLAGS | K_MEM_PERM_RW);
|
||||
|
||||
/* Initialize buf with some bytes */
|
||||
|
|
@ -60,7 +60,7 @@ void test_k_mem_map_rw(void)
|
|||
}
|
||||
|
||||
/* Map again this time only allowing reads */
|
||||
k_mem_map(&mapped_ro, Z_MEM_PHYS_ADDR((uintptr_t)buf),
|
||||
k_mem_map(&mapped_ro, (uintptr_t)buf,
|
||||
BUF_SIZE, BASE_FLAGS);
|
||||
|
||||
/* Check that the mapped area contains the expected data. */
|
||||
|
|
@ -97,13 +97,13 @@ void test_k_mem_map_exec(void)
|
|||
expect_fault = false;
|
||||
|
||||
/* Map with write permissions and copy the function into the page */
|
||||
k_mem_map(&mapped_rw, Z_MEM_PHYS_ADDR((uintptr_t)test_page),
|
||||
k_mem_map(&mapped_rw, (uintptr_t)test_page,
|
||||
sizeof(test_page), BASE_FLAGS | K_MEM_PERM_RW);
|
||||
|
||||
memcpy(mapped_rw, &transplanted_function, CONFIG_MMU_PAGE_SIZE);
|
||||
|
||||
/* Now map with execution enabled and try to run the copied fn */
|
||||
k_mem_map(&mapped_exec, Z_MEM_PHYS_ADDR((uintptr_t)test_page),
|
||||
k_mem_map(&mapped_exec, (uintptr_t)test_page,
|
||||
sizeof(test_page), BASE_FLAGS | K_MEM_PERM_EXEC);
|
||||
|
||||
func = (void (*)(bool *executed))mapped_exec;
|
||||
|
|
@ -111,7 +111,7 @@ void test_k_mem_map_exec(void)
|
|||
zassert_true(executed, "function did not execute");
|
||||
|
||||
/* Now map without execution and execution should now fail */
|
||||
k_mem_map(&mapped_ro, Z_MEM_PHYS_ADDR((uintptr_t)test_page),
|
||||
k_mem_map(&mapped_ro, (uintptr_t)test_page,
|
||||
sizeof(test_page), BASE_FLAGS);
|
||||
|
||||
func = (void (*)(bool *executed))mapped_ro;
|
||||
|
|
@ -143,7 +143,7 @@ void test_k_mem_map_side_effect(void)
|
|||
* Show that by mapping test_page to an RO region, we can still
|
||||
* modify test_page.
|
||||
*/
|
||||
k_mem_map(&mapped, Z_MEM_PHYS_ADDR((uintptr_t)test_page),
|
||||
k_mem_map(&mapped, (uintptr_t)test_page,
|
||||
sizeof(test_page), BASE_FLAGS);
|
||||
|
||||
/* Should NOT fault */
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
#define FAULTY_ADDRESS 0x0FFFFFFF
|
||||
#elif CONFIG_MMU
|
||||
/* Just past the permanent RAM mapping should be a non-present page */
|
||||
#define FAULTY_ADDRESS (CONFIG_KERNEL_VM_BASE + (CONFIG_SRAM_SIZE * 1024UL))
|
||||
#define FAULTY_ADDRESS (CONFIG_SRAM_BASE_ADDRESS + (CONFIG_SRAM_SIZE * 1024UL))
|
||||
#else
|
||||
#define FAULTY_ADDRESS 0xFFFFFFF0
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue