arch: arm: stm32: Basic STM32F7 family support

The patch includes support for STM32F746xG subfamily.
Related to issue #6981.

Signed-off-by: Yurii Hamann <yurii@hamann.site>

arch/arm/soc/st_stm32/stm32f7/CMakeLists.txt

@@ -0,0 +1,4 @@
+zephyr_include_directories(${ZEPHYR_BASE}/drivers)
+zephyr_sources(
+  soc.c
+  )

arch/arm/soc/st_stm32/stm32f7/Kconfig.defconfig.series

@@ -0,0 +1,15 @@
+# Kconfig.defconfig.series - ST Microelectronics STM32F7 MCU line
+#
+# Copyright (c) 2018 Yurii Hamann
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_SERIES_STM32F7X
+
+gsource "arch/arm/soc/st_stm32/stm32f7/Kconfig.defconfig.stm32f7*"
+
+config SOC_SERIES
+	default "stm32f7"
+
+endif # SOC_SERIES_STM32F7X

arch/arm/soc/st_stm32/stm32f7/Kconfig.defconfig.stm32f746xg

@@ -0,0 +1,18 @@
+# Kconfig - ST STM32F746XG MCU configuration options
+#
+# Copyright (c) 2018 Yurii Hamann
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_STM32F746XG
+
+config SOC
+	string
+	default "stm32f746xx"
+
+config NUM_IRQS
+	int
+	default 98
+
+endif # SOC_STM32F746XG

arch/arm/soc/st_stm32/stm32f7/Kconfig.series

@@ -0,0 +1,18 @@
+# Kconfig - ST Microelectronics STM32F7 MCU series
+#
+# Copyright (c) 2018 Yurii Hamann
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config SOC_SERIES_STM32F7X
+	bool "STM32F7x Series MCU"
+	select CPU_CORTEX_M7
+	select CPU_HAS_FPU
+	select SOC_FAMILY_STM32
+	select SYS_POWER_LOW_POWER_STATE_SUPPORTED
+	select HAS_STM32CUBE
+	select CPU_HAS_SYSTICK
+	select CLOCK_CONTROL_STM32_CUBE if CLOCK_CONTROL
+	help
+	 Enable support for STM32F7 MCU series

arch/arm/soc/st_stm32/stm32f7/Kconfig.soc

@@ -0,0 +1,15 @@
+# Kconfig.soc - ST Microelectronics STM32F7 MCU line
+#
+# Copyright (c) 2018 Yurii Hamann
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+choice
+prompt "STM32F7x MCU Selection"
+depends on SOC_SERIES_STM32F7X
+
+config SOC_STM32F746XG
+	bool "STM32F746XG"
+
+endchoice

arch/arm/soc/st_stm32/stm32f7/dts.fixup

@@ -0,0 +1,5 @@
+/* SoC level DTS fixup file */
+
+#define CONFIG_NUM_IRQ_PRIO_BITS				ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+
+/* End of SoC Level DTS fixup file */

arch/arm/soc/st_stm32/stm32f7/linker.ld

@@ -0,0 +1,9 @@
+/* linker.ld - Linker command/script file */
+
+/*
+ * Copyright (c) 2018 Yurii Hamann
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arch/arm/cortex_m/scripts/linker.ld>

arch/arm/soc/st_stm32/stm32f7/soc.c

@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2018 Yurii Hamann
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief System/hardware module for STM32F7 processor
+ */
+
+#include <kernel.h>
+#include <device.h>
+#include <init.h>
+#include <soc.h>
+#include <arch/cpu.h>
+#include <cortex_m/exc.h>
+
+/**
+ * @brief Perform basic hardware initialization at boot.
+ *
+ * This needs to be run from the very beginning.
+ * So the init priority has to be 0 (zero).
+ *
+ * @return 0
+ */
+static int st_stm32f7_init(struct device *arg)
+{
+	u32_t key;
+
+	ARG_UNUSED(arg);
+
+	key = irq_lock();
+
+	_ClearFaults();
+
+	/* Install default handler that simply resets the CPU
+	 * if configured in the kernel, NOP otherwise
+	 */
+	NMI_INIT();
+
+	irq_unlock(key);
+
+	/* Update CMSIS SystemCoreClock variable (HCLK) */
+	/* At reset, system core clock is set to 16 MHz from HSI */
+	SystemCoreClock = 16000000;
+
+	return 0;
+}
+
+SYS_INIT(st_stm32f7_init, PRE_KERNEL_1, 0);

arch/arm/soc/st_stm32/stm32f7/soc.h

@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2018 Yurii Hamann
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file SoC configuration macros for the ST STM32F7 family processors.
+ *
+ * Based on reference manual:
+ * RM0385 Reference manual STM32F75xxx and STM32F74xxx
+ *   advanced ARM(r)-based 32-bit MCUs
+ *
+ * Chapter 2.2.2: Memory map and register boundary addresses
+ */
+
+#ifndef _STM32F7_SOC_H_
+#define _STM32F7_SOC_H_
+
+#ifndef _ASMLANGUAGE
+
+#include <device.h>
+#include <misc/util.h>
+#include <stm32f7xx.h>
+
+#endif /* !_ASMLANGUAGE */
+
+#endif /* _STM32F7_SOC_H_ */

arch/arm/soc/st_stm32/stm32f7/soc_registers.h

@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2018 Yurii Hamann
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _STM32F7_SOC_REGISTERS_H_
+#define _STM32F7_SOC_REGISTERS_H_
+
+/* include register mapping headers */
+
+#endif /* _STM32F7_SOC_REGISTERS_H_ */