patrick/zephyr
1
0
Fork 0
Code Issues Pull requests Actions 8 Packages Projects Releases Wiki Activity

arch/x86: Have a dedicated place for CPUID related functions

Browse source 
This will centralize CPUID related accessors. There was no need for it
so far, but this is going to change.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2022-02-04 09:55:47 +01:00 committed by Anas Nashif
parent 52bf19b59b
commit 7ea9b169f7
4 changed files with 53 additions and 21 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
arch/x86/core/CMakeLists.txt
View file

@ -6,6 +6,7 @@ zephyr_library()
zephyr_library_sources(cpuhalt.c)
zephyr_library_sources(prep_c.c)
zephyr_library_sources(fatal.c)
zephyr_library_sources(cpuid.c)
zephyr_library_sources(spec_ctrl.c)
zephyr_library_sources_ifdef(CONFIG_X86_MEMMAP memmap.c)

23
arch/x86/core/cpuid.c Normal file
View file

@ -0,0 +1,23 @@
/*
* Copyright (c) 2022 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <cpuid.h> /* Header provided by the toolchain. */
#include <kernel_structs.h>
#include <arch/x86/cpuid.h>
#include <kernel.h>
uint32_t z_x86_cpuid_extended_features(void)
{
uint32_t eax, ebx, ecx = 0U, edx;
if (__get_cpuid(CPUID_EXTENDED_FEATURES_LVL,
&eax, &ebx, &ecx, &edx) == 0) {
return 0;
}
return edx;
}

23
arch/x86/core/spec_ctrl.c
View file

@ -4,13 +4,12 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <cpuid.h> /* Header provided by the toolchain. */
#include <init.h>
#include <kernel_structs.h>
#include <kernel_arch_data.h>
#include <kernel_arch_func.h>
#include <arch/x86/msr.h>
#include <arch/x86/cpuid.h>
#include <kernel.h>
/*
@ -18,31 +17,13 @@
* https://software.intel.com/security-software-guidance/api-app/sites/default/files/336996-Speculative-Execution-Side-Channel-Mitigations.pdf
*/
#define CPUID_EXTENDED_FEATURES_LVL 7
/* Bits to check in CPUID extended features */
#define CPUID_SPEC_CTRL_SSBD BIT(31)
#define CPUID_SPEC_CTRL_IBRS BIT(26)
#if defined(CONFIG_DISABLE_SSBD) || defined(CONFIG_ENABLE_EXTENDED_IBRS)
static uint32_t cpuid_extended_features(void)
{
uint32_t eax, ebx, ecx = 0U, edx;
if (__get_cpuid(CPUID_EXTENDED_FEATURES_LVL,
&eax, &ebx, &ecx, &edx) == 0) {
return 0;
}
return edx;
}
static int spec_ctrl_init(const struct device *dev)
{
ARG_UNUSED(dev);
uint32_t enable_bits = 0U;
uint32_t cpuid7 = cpuid_extended_features();
uint32_t cpuid7 = z_x86_cpuid_extended_features();
#ifdef CONFIG_DISABLE_SSBD
if ((cpuid7 & CPUID_SPEC_CTRL_SSBD) != 0U) {

27
include/arch/x86/cpuid.h Normal file
View file

@ -0,0 +1,27 @@
/*
* Copyright (c) 2022 Intel Corp.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_ARCH_X86_CPUID_H_
#define ZEPHYR_INCLUDE_ARCH_X86_CPUID_H_
#ifndef _ASMLANGUAGE
#ifdef __cplusplus
extern "C" {
#endif
#define CPUID_EXTENDED_FEATURES_LVL 7
/* Bits to check in CPUID extended features */
#define CPUID_SPEC_CTRL_SSBD BIT(31)
#define CPUID_SPEC_CTRL_IBRS BIT(26)
uint32_t z_x86_cpuid_extended_features(void);
#ifdef __cplusplus
}
#endif
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_ARCH_X86_CPUID_H_ */