boards: add seeed studio LoRa-E5 Dev board
This commit adds support for the seeed studio LoRa-E5 Dev board, which is powered by a module based on stm32wle5jc soc. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit is contained in:
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8
boards/arm/lora_e5_dev_board/Kconfig.board
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boards/arm/lora_e5_dev_board/Kconfig.board
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# LoRa-E5 Dev board configuration
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# Copyright (c) 2021 Thomas Stranger
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_LORA_E5_DEV_BOARD
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bool "LoRa E5 Development Board"
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depends on SOC_STM32WLE5XX
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boards/arm/lora_e5_dev_board/Kconfig.defconfig
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boards/arm/lora_e5_dev_board/Kconfig.defconfig
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# LoRa-E5 Dev board configuration
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# Copyright (c) 2021 Thomas Stranger
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_LORA_E5_DEV_BOARD
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config BOARD
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default "lora_e5_dev_board"
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endif # BOARD_LORA_E5_DEV_BOARD
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boards/arm/lora_e5_dev_board/board.cmake
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boards/arm/lora_e5_dev_board/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(pyocd "--target=stm32wle5jcix")
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board_runner_args(pyocd "--flash-opt=-O reset_type=hw")
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board_runner_args(pyocd "--flash-opt=-O connect_mode=under-reset")
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board_runner_args(jlink "--device=STM32WLE5JC" "--speed=4000" "--reset-after-load")
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset=hw")
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include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake)
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BIN
boards/arm/lora_e5_dev_board/doc/img/lora_e5_dev_board.png
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boards/arm/lora_e5_dev_board/doc/img/lora_e5_dev_board.png
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boards/arm/lora_e5_dev_board/doc/lora_e5_dev_board.rst
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boards/arm/lora_e5_dev_board/doc/lora_e5_dev_board.rst
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.. _lora_e5_dev_board:
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Seeed Studio LoRa-E5 Dev Board
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##############################
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Overview
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********
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The LoRa-E5 Dev Board is a compact board for the evaluation of the
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Seeed Studio LoRa-E5 STM32WLE5JC module.
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The LoRa-E5-HF STM32WLE5JC Module supports multiple LPWAN protocols on the
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868/915MHz frequency bands with up to 20.8dBm output power at 3.3V.
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All GPIOs of the LoRa-E5 Module are laid out supporting
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various data protocols and interfaces including RS-485 and Grove.
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.. image:: img/lora_e5_dev_board.png
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:width: 700px
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:align: center
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:alt: LoRa-E5 Dev board
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Hardware
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********
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The boards LoRa-E5 Module packages a STM32WLE5JC SOC, a 32MHz TCXO,
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and a 32.768kHz crystal oscillator in a 28-pin SMD package.
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This STM32WLEJC SOC is powered by ARM Cortex-M4 core and integrates Semtech
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SX126X LoRa IP to support (G)FSK, BPSK, (G)MSK, and LoRa modulations.
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- LoRa-E5 STM32WLE5JC Module with STM32WLE5JC multiprotocol LPWAN single-core
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32-bit microcontroller (Arm® Cortex®-M4 at 48 MHz) in 28-pin SMD package
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featuring:
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- Ultra-low-power MCU
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- RF transceiver (150 MHz to 960 MHz frequency range) supporting LoRa®,
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(G)FSK, (G)MSK, and BPSK modulations
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- 256-Kbyte Flash memory and 64-Kbyte SRAM
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- Hardware encryption AES256-bit and a True random number generator
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- 1 user LED
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- 1 user, 1 boot, and 1 reset push-button
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- 32.768 kHz LSE crystal oscillator
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- 32 MHz HSE oscillator
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- 1 LM75A Temperature Sensor
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- 1 SPI-Flash Bonding Pad(not populated)
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- Board connectors:
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- USB Type-C connector
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- JST2.0 Battery connector (3-5V)
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- 3 Grove connectors(2x IIC and 1x UART)
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- RS-485 connector
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- SMA-K and IPEX antenna connectors
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- Delivered with SMA antenna (per default IPEX connector is disconnected)
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- Flexible power-supply options: USB Type C, JST2.0, 2x AA 3V Battery Holder, or
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external sources via header.
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- Switchable 3.3V and 5V power rails.
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- Comprehensive free software libraries and examples available with the
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STM32CubeWL MCU Package
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- Support of a wide choice of Integrated Development Environments (IDEs)
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including IAR Embedded Workbench®, MDK-ARM, and STM32CubeIDE
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- Suitable for rapid prototyping of end nodes based on LoRaWAN, Sigfox, wM-Bus,
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and many other proprietary protocols
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More information about the board can be found at the `LoRa-E5 Dev Board Wiki`_.
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More information about LoRa-E5 STM32WLE5JC Module can be found here:
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- `LoRa-E5 STM32WLE5JC Module Wiki`_
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- `LoRa-E5 STM32WLE5JC Module datasheet`_
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- `STM32WLE5JC datasheet`_
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- `STM32WLE5JC reference manual`_
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- `STM32WLE5JC on www.st.com`_
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Supported Features
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==================
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The Zephyr LoRa-E5 Dev Board configuration supports the following hardware
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features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| MPU | on-chip | arm memory protection unit |
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+-----------+------------+-------------------------------------+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+-----------+------------+-------------------------------------+
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| CLOCK | on-chip | reset and clock control |
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+-----------+------------+-------------------------------------+
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| COUNTER | on-chip | rtc |
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+-----------+------------+-------------------------------------+
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| WATCHDOG | on-chip | independent watchdog |
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig and dts files:
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``boards/arm/lora_e5_dev_board/lora_e5_dev_board_defconfig``
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``boards/arm/lora_e5_dev_board/lora_e5_dev_board.dts``
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Connections and IOs
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===================
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LoRa-E5 Dev Board has 4 GPIO controllers. These controllers are responsible
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for pin muxing, input/output, pull-up, etc.
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Available pins:
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---------------
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.. image:: img/lora_e5_dev_board_pinout.png
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:align: center
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:alt: LoRa-E5 Dev Board Pinout
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Default Zephyr Peripheral Mapping:
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----------------------------------
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.. rst-class:: rst-columns
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- LPUART_1 TX : PC1
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- LPUART_1 RX : PC0
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- USART_1 TX : PB6
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- USART_1 RX : PB7
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- USART_2 TX : PA2
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- USART_2 RX : PA3
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- I2C_2_SCL : PB15
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- I2C_2_SDA : PA15
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- SPI_2_NSS : PB9
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- SPI_2_SCK : PB13
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- SPI_2_MISO : PB14
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- SPI_2_MOSI : PA10
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- BOOT_PB : PB13
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- USER_PB : PA0
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- LED_1 : PB5
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- ADC1 IN2 : PB3
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Default Zephyr Peripheral to Connector Mapping:
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-----------------------------------------------
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.. rst-class:: rst-columns
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- RS-485: USART_2
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- grove_serial: USART_1
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- grove_i2c: I2C_2
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Power Rails
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-----------
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The board has multiple power rails, which are always turned on in the default
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configuration.
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+---------+-------------------+-------------------+
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| Name | Derived from | Controlled by |
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+=========+===================+===================+
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| MAIN | battery, USB, ... | Always on |
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+---------+-------------------+-------------------+
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| VCC | MAIN | Always on |
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+---------+-------------------+-------------------+
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| 5V | MAIN | SOC pin PB10 |
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+---------+-------------------+-------------------+
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| 3V3 | VCC | SOC pin PA9 |
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+---------+-------------------+-------------------+
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A list of the devices and their power rails:
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+--------------------+---------+
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| Device | Rail |
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+====================+=========+
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| STM32WLE5JC | VCC |
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+--------------------+---------+
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| RS-485 Transceiver | 3V3 |
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+--------------------+---------+
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System Clock
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------------
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LoRa-E5 Development board System Clock could be driven by the low-power
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internal(MSI), High-speed internal(HSI) or High-speed external(HSE) oscillator,
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as well as main PLL clock.
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By default System clock is driven by the MSI clock at 48MHz.
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Programming and Debugging
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*************************
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Applications for the ``lora_e5_dev_board`` board configuration can be built the
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usual way (see :ref:`build_an_application`).
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In the factory the module is flashed with an DFU bootloader, an AT command
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firmware, and the read protection level 1 is enabled.
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So before you can program a zephyr application to the module for the first time
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you have to reset the read protection to level 0.
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In case you use an st-link debugger you can use the STM32CubeProgrammer GUI to
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set the RDP option byte to ``AA``,
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or use the STM32_Programmer_CLI passing the ``--readunprotect`` command
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to perform this read protection regression.
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The RDP level 1 to RDP level 0 regression will erase the factory programmed AT
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firmware, from which seeed has neither released the source code nor a binary.
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Also, note that on the module the ``BOOT0`` pin of the SOC is not accessible,
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so the system bootloader will only be executed if configured in the option bytes.
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Flashing
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========
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The LoRa-E5 Dev Board does not include a on-board debug probe.
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But the module can be debugged by connecting an external debug probe to the
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blue 2.54mm header labeled ``SWIM/SWD``.
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Depending on the external probe used, ``openocd``, the ``stm32cubeprogrammer``,
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``pyocd``, ``blackmagic``, or ``jlink`` runner can be used to flash the board.
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Additional notes:
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- Pyocd: For STM32WL support Pyocd needs additional target information, which
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can be installed by adding "pack" support with the following pyocd command:
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.. code-block:: console
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$ pyocd pack --update
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$ pyocd pack --install stm32wl
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Flashing an application to LoRa-E5 Dev board
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--------------------------------------------
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Connect the LoRa-E5 to your host computer using the external debug probe.
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Then build and flash an application. Here is an example for the
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:ref:`hello_world` application.
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Run a serial host program to connect with your board:
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Per default the console on ``usart1`` is available on the USB Type C connector
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via the build-in USB to UART converter.
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.. code-block:: console
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$ picocom --baud 115200 /dev/ttyACM0
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Then build and flash the application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: lora_e5_dev_board
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:goals: build flash
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Debugging
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=========
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You can debug an application in the usual way. Here is an example for the
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:ref:`blinky-sample` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: lora_e5_dev_board
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:maybe-skip-config:
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:goals: debug
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.. _LoRa-E5 Dev Board Wiki:
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https://wiki.seeedstudio.com/LoRa_E5_Dev_Board/
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.. _LoRa-E5 STM32WLE5JC Module Wiki:
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https://wiki.seeedstudio.com/LoRa-E5_STM32WLE5JC_Module/
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.. _LoRa-E5 STM32WLE5JC Module datasheet:
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https://files.seeedstudio.com/products/317990687/res/LoRa-E5%20module%20datasheet_V1.0.pdf
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.. _STM32WLE5JC on www.st.com:
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https://www.st.com/en/microcontrollers-microprocessors/stm32wle5jc.html
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.. _STM32WLE5JC datasheet:
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https://www.st.com/resource/en/datasheet/stm32wle5jc.pdf
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.. _STM32WLE5JC reference manual:
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https://www.st.com/resource/en/reference_manual/dm00530369-stm32wlex-advanced-armbased-32bit-mcus-with-subghz-radio-solution-stmicroelectronics.pdf
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174
boards/arm/lora_e5_dev_board/lora_e5_dev_board.dts
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boards/arm/lora_e5_dev_board/lora_e5_dev_board.dts
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/*
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* Copyright (c) 2021 Thomas Stranger
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <seeed/lora-e5.dtsi>
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/ {
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model = "Seeed Studio LoRa-E5 Dev Board";
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compatible = "seeed,lora-e5-dev-board";
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chosen {
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zephyr,console = &usart1;
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zephyr,shell-uart = &usart1;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,code-partition = &flash0;
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};
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leds {
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compatible = "gpio-leds";
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red_led_1: led_0 {
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gpios = <&gpiob 5 GPIO_ACTIVE_LOW>;
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label = "User LED1";
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/* the led can be disconnected, using J16 (D5) */
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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boot_button: button_0 {
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label = "SW1";
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gpios = <&gpiob 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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};
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user_button: button_1 {
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label = "SW2";
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gpios = <&gpioa 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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/* user_button can be disconnected, using J14 (D0) */
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};
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};
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aliases {
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led0 = &red_led_1;
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sw0 = &boot_button;
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sw1 = &user_button;
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};
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pwr_3v3: pwr-3v3-ctrl {
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/*
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* PWR rail for SPI-flash, Temp-Sensor, RS-485 Transceiver,
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* and for external devices(Grove, header).
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* Requires closed J15 (D9)
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*/
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compatible = "regulator-fixed-sync", "regulator-fixed";
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label = "pwr-3v3-ctrl";
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regulator-name = "pwr-3v3-ctrl";
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enable-gpios = <&gpioa 9 GPIO_ACTIVE_HIGH>;
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regulator-boot-on;
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status = "okay";
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};
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pwr_5v: pwr-5v-ctrl {
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/*
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* Available for external devices on header J2
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* Requires closed J6 (D10)
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*/
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compatible = "regulator-fixed-sync", "regulator-fixed";
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label = "pwr-5v-ctrl";
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regulator-name = "pwr-5v-ctrl";
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enable-gpios = <&gpiob 10 GPIO_ACTIVE_HIGH>;
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regulator-boot-on;
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status = "okay";
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};
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};
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&clk_msi {
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status = "okay";
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msi-range = <11>;
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};
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&pll {
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clocks = <&clk_msi>;
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div-m = <3>;
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mul-n = <6>;
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div-r = <2>;
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div-q = <2>;
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div-p = <2>;
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status = "okay";
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};
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&rcc {
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clocks = <&clk_msi>;
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clock-frequency = <DT_FREQ_M(48)>;
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cpu1-prescaler = <1>;
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ahb3-prescaler = <1>;
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apb1-prescaler = <1>;
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apb2-prescaler = <1>;
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};
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&lpuart1 {
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pinctrl-0 = <&lpuart1_tx_pc1 &lpuart1_rx_pc0>;
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current-speed = <115200>;
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status = "okay";
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};
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&usart1 {
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pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
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current-speed = <115200>;
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status = "okay";
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};
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&usart2 {
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pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
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current-speed = <115200>;
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status = "okay";
|
||||
/* PB4 can select RS-485 TX, when J17 (A4) is closed */
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-0 = <&i2c2_scl_pb15 &i2c2_sda_pa15>;
|
||||
status = "okay";
|
||||
clock-frequency = <I2C_BITRATE_FAST>;
|
||||
|
||||
/* LM75ADP temperature sensor on addr 0x48 */
|
||||
};
|
||||
|
||||
/* Attention!: the spi-sck pin is in confict with the boot_button on pb13 */
|
||||
&spi2 {
|
||||
pinctrl-0 = <&spi2_nss_pb9 &spi2_sck_pb13
|
||||
&spi2_miso_pb14 &spi2_mosi_pa10>;
|
||||
status = "okay";
|
||||
|
||||
/* unpopulated footprint for spi flash */
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iwdg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&adc1 {
|
||||
pinctrl-0 = <&adc_in2_pb3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* connectors: */
|
||||
grove_serial: &usart1 {};
|
||||
grove_i2c: &i2c2 {};
|
||||
|
||||
&flash0 {
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* 16KB (8x2kB pages) of storage at the end of the flash */
|
||||
storage_partition: partition@3c000 {
|
||||
label = "storage";
|
||||
reg = <0x0003c000 0x00004000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Other Pins:
|
||||
* Not assigned: None
|
||||
* Debug: PA13(swdio), PA14(swclk)
|
||||
*/
|
18
boards/arm/lora_e5_dev_board/lora_e5_dev_board.yaml
Normal file
18
boards/arm/lora_e5_dev_board/lora_e5_dev_board.yaml
Normal file
|
@ -0,0 +1,18 @@
|
|||
identifier: lora_e5_dev_board
|
||||
name: Seeedstudio LoRa-E5 Dev Board
|
||||
type: mcu
|
||||
arch: arm
|
||||
toolchain:
|
||||
- zephyr
|
||||
- gnuarmemb
|
||||
- xtools
|
||||
ram: 64
|
||||
flash: 256
|
||||
supported:
|
||||
- counter
|
||||
- gpio
|
||||
- i2c
|
||||
- nvs
|
||||
- spi
|
||||
- uart
|
||||
- watchdog
|
27
boards/arm/lora_e5_dev_board/lora_e5_dev_board_defconfig
Normal file
27
boards/arm/lora_e5_dev_board/lora_e5_dev_board_defconfig
Normal file
|
@ -0,0 +1,27 @@
|
|||
CONFIG_SOC_SERIES_STM32WLX=y
|
||||
CONFIG_SOC_STM32WLE5XX=y
|
||||
|
||||
# enable uart driver
|
||||
CONFIG_SERIAL=y
|
||||
|
||||
# enable pinmux
|
||||
CONFIG_PINMUX=y
|
||||
|
||||
# enable GPIO
|
||||
CONFIG_GPIO=y
|
||||
|
||||
# Enable Clocks
|
||||
CONFIG_CLOCK_CONTROL=y
|
||||
|
||||
# console
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
|
||||
# Enable MPU
|
||||
CONFIG_ARM_MPU=y
|
||||
|
||||
# Enable HW stack protection
|
||||
CONFIG_HW_STACK_PROTECTION=y
|
||||
|
||||
# Enable regulator for the power-rails
|
||||
CONFIG_REGULATOR=y
|
7
boards/arm/lora_e5_dev_board/support/openocd.cfg
Normal file
7
boards/arm/lora_e5_dev_board/support/openocd.cfg
Normal file
|
@ -0,0 +1,7 @@
|
|||
source [find interface/stlink.cfg]
|
||||
|
||||
transport select hla_swd
|
||||
|
||||
source [find target/stm32wlx.cfg]
|
||||
|
||||
reset_config srst_only
|
Loading…
Reference in a new issue