tests: drivers: adc_dma: add test for nucleo_l476rg
Add test to verify the ADC + DMA functionality works for the STM32L476 MCU. Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
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tests/drivers/adc/adc_dma/boards/nucleo_l476rg.conf
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tests/drivers/adc/adc_dma/boards/nucleo_l476rg.conf
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#
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# Copyright (c) 2023 Hein Wessels, Nobleo Technology
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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CONFIG_ADC_STM32_DMA=y
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CONFIG_ADC_ASYNC=y
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tests/drivers/adc/adc_dma/boards/nucleo_l476rg.overlay
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tests/drivers/adc/adc_dma/boards/nucleo_l476rg.overlay
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/*
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* Copyright (c) 2023 Hein Wessels, Nobleo Technology
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&adc1 {
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dmas = < &dma1 1 0 (STM32_DMA_PERIPH_RX | STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS) >;
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dma-names = "dma";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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test_dma: &dma1 {
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status = "okay";
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};
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@ -61,6 +61,17 @@
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#define ADC_2ND_CHANNEL_ID 7
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#define ALIGNMENT 32
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#elif defined(CONFIG_BOARD_NUCLEO_L476RG)
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#define ADC_DEVICE_NODE DT_INST(0, st_stm32_adc)
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#define ADC_RESOLUTION 12
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#define ADC_GAIN ADC_GAIN_1
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#define ADC_REFERENCE ADC_REF_INTERNAL
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#define ADC_ACQUISITION_TIME ADC_ACQ_TIME_DEFAULT
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#define ADC_1ST_CHANNEL_ID 1
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#define ADC_2ND_CHANNEL_ID 7
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#define ALIGNMENT 32
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#endif
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/* Invalid value that is not supposed to be written by the driver. It is used
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