tests: arch: arm: add test-suite to verify syscall internals
This commit contributes a simple test-suite which verifies the internal (ARCH) implementation for user mode syscalls, as well as the stack limit checking mechanism for ARMv8-M MCUS. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos
Andrew Boie
parent
bd8a3bba54
commit
83b278ec01
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@ -1,7 +1,10 @@
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Title: Test to verify the thread-swap (context-switch) mechanism (ARM Only)
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Title: Test suite to verify the thread-swap (context-switch) and system-calls
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mechanisms (ARM Only)
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Description:
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Thread-swap test:
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This test verifies that the ARM thread context-switch mechanism
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behaves as expected. In particular, the test verifies that:
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- the callee-saved registers are saved and restored, properly,
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@ -25,6 +28,18 @@ Notes:
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The test is currently supported in ARM Cortex-M Baseline and Mainline
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targets.
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Syscalls test:
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This test verifies that the ARM mechanism for user system calls
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behaves as expected. In particular, the test verifies that:
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- the mode variable with respect to the user mode flag always indicates
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the mode in which a user thread is currently executing.
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- threads in system calls are using the privileged thread stack
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- stack pointer limit checking mechanism behaves as expected for
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user threads in PRIV mode and supervisor threads
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The test is currently supported in ARM Cortex-M Baseline and Mainline
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targets with support for user space.
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---------------------------------------------------------------------------
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@ -59,5 +74,13 @@ starting test - test_arm_thread_swap
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PASS - test_arm_thread_swap
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===================================================================
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Test suite arm_thread_swap succeeded
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Running test suite arm_syscalls
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===================================================================
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starting test - test_arm_syscalls
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Available IRQ line: 68
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USR Thread: IRQ Line: 68
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PASS - test_arm_syscalls
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===================================================================
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Test suite arm_syscalls succeeded
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===================================================================
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PROJECT EXECUTION SUCCESSFUL
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@ -1,3 +1,5 @@
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CONFIG_ZTEST=y
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CONFIG_DYNAMIC_INTERRUPTS=y
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CONFIG_TEST_USERSPACE=y
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CONFIG_APPLICATION_DEFINED_SYSCALL=y
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CONFIG_MAIN_STACK_SIZE=1024
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241
tests/arch/arm/arm_thread_swap/src/arm_syscalls.c
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241
tests/arch/arm/arm_thread_swap/src/arm_syscalls.c
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@ -0,0 +1,241 @@
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/*
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* Copyright (c) 2020 Nordic Semiconductor ASA.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <ztest.h>
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#include <arch/cpu.h>
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#include <arch/arm/aarch32/cortex_m/cmsis.h>
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#include <kernel_structs.h>
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#include <offsets_short_arch.h>
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#include <ksched.h>
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#if !defined(__GNUC__)
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#error __FILE__ goes only with Cortex-M GCC
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#endif
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#if !defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) && \
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!defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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#error "Unsupported architecture"
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#endif
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#if defined(CONFIG_USERSPACE)
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#define PRIORITY 0
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static struct k_thread user_thread;
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static K_THREAD_STACK_DEFINE(user_thread_stack, 1024);
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#include <syscall_handler.h>
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#include "test_syscalls.h"
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void z_impl_test_arm_user_syscall(void)
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{
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/* User thread system call
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*
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* Verify the following
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* - mode variable indicates PRIV mode
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* - the PSP is inside the thread's privileged stack
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* - PSPLIM register guards the privileged stack
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* - MSPLIM register still guards the interrupt stack
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*/
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zassert_true((_current->arch.mode & CONTROL_nPRIV_Msk) == 0,
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"mode variable not set to PRIV mode in system call\n");
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zassert_false(arch_is_user_context(),
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"arch_is_user_context() indicates nPRIV\n");
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zassert_true(
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((__get_PSP() >= _current->arch.priv_stack_start) &&
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(__get_PSP() < (_current->arch.priv_stack_start +
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CONFIG_PRIVILEGED_STACK_SIZE))),
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"Process SP outside thread privileged stack limits\n");
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#if defined(CONFIG_BUILTIN_STACK_GUARD)
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zassert_true(__get_PSPLIM() == _current->arch.priv_stack_start,
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"PSPLIM not guarding the thread's privileged stack\n");
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zassert_true(__get_MSPLIM() == (u32_t)_interrupt_stack,
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"MSPLIM not guarding the interrupt stack\n");
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#endif
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}
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static inline void z_vrfy_test_arm_user_syscall(void)
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{
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z_impl_test_arm_user_syscall();
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}
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#include <syscalls/test_arm_user_syscall_mrsh.c>
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void arm_isr_handler(void *args)
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{
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/* Interrupt triggered while running a user thread
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*
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* Verify the following
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* - mode variable indicates nPRIV mode
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* - the PSP is inside the thread's default (user) stack
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* - PSPLIM register is not set (applies on the second ISR call)
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* - MSPLIM register still guards the interrupt stack
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*/
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zassert_true((_current->arch.mode & CONTROL_nPRIV_Msk) != 0,
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"mode variable not set to nPRIV mode for user thread\n");
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zassert_false(arch_is_user_context(),
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"arch_is_user_context() indicates nPRIV in ISR\n");
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zassert_true(
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((__get_PSP() >= _current->stack_info.start) &&
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(__get_PSP() < (_current->stack_info.start +
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_current->stack_info.size))),
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"Process SP outside thread stack limits\n");
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static int first_call = 1;
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if (first_call == 1) {
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first_call = 0;
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/* Trigger thread yield() manually */
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(void)irq_lock();
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z_move_thread_to_end_of_prio_q(_current);
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SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
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irq_unlock(0);
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} else if (first_call == 0) {
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#if defined(CONFIG_BUILTIN_STACK_GUARD)
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/* Second ISR run occurs after thread context-switch.
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* We expect PSPLIM to be clear at this point.
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*/
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zassert_true(__get_PSPLIM() == 0,
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"PSPLIM not clear\n");
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zassert_true(__get_MSPLIM() == (u32_t)_interrupt_stack,
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"MSPLIM not guarding the interrupt stack\n");
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#endif
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}
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}
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static void user_thread_entry(u32_t irq_line)
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{
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/* User Thread */
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#if !defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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ARG_UNUSED(irq_line);
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#endif
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/* Trigger a system call to switch to supervisor thread
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* mode and verify the thread state during system calls.
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*/
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test_arm_user_syscall();
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#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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/*
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* Trigger an ISR to switch to handler mode, to inspect
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* the kernel structs and verify the thread state.
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*/
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TC_PRINT("USR Thread: IRQ Line: %u\n", (u32_t)irq_line);
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NVIC->STIR = irq_line;
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__DSB();
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__ISB();
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/* ISR is set to cause thread to context-switch -out and -in again.
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* We inspect for a second time, to verlfy the status, after
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* the user thread is switch back in.
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*/
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NVIC->STIR = irq_line;
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__DSB();
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__ISB();
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#endif
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}
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void test_arm_syscalls(void)
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{
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int i = 0;
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/* Supervisor Thread (ztest thread)
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*
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* Verify the following:
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* - the "mode" variable indicates PRIV mode
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* - arch_is_user_context() is negative
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* - the PSP is inside the default thread stack
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* - PSPLIM register guards the default stack
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* - MSPLIM register guards the interrupt stack
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*/
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zassert_true((_current->arch.mode & CONTROL_nPRIV_Msk) == 0,
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"mode variable not set to PRIV mode for supervisor thread\n");
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zassert_false(arch_is_user_context(),
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"arch_is_user_context() indicates nPRIV\n");
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zassert_true(
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((__get_PSP() >= _current->stack_info.start) &&
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(__get_PSP() < (_current->stack_info.start +
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_current->stack_info.size))),
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"Process SP outside thread stack limits\n");
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#if defined(CONFIG_BUILTIN_STACK_GUARD)
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zassert_true(__get_PSPLIM() == _current->stack_info.start,
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"PSPLIM not guarding the default stack\n");
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zassert_true(__get_MSPLIM() == (u32_t)_interrupt_stack,
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"MSPLIM not guarding the interrupt stack\n");
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#endif
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#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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for (i = CONFIG_NUM_IRQS - 1; i >= 0; i--) {
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if (NVIC_GetEnableIRQ(i) == 0) {
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/*
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* Interrupts configured statically with IRQ_CONNECT(.)
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* are automatically enabled. NVIC_GetEnableIRQ()
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* returning false, here, implies that the IRQ line is
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* either not implemented or it is not enabled, thus,
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* currently not in use by Zephyr.
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*/
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/* Set the NVIC line to pending. */
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NVIC_SetPendingIRQ(i);
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if (NVIC_GetPendingIRQ(i)) {
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/* If the NVIC line is pending, it is
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* guaranteed that it is implemented.
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*/
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break;
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}
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}
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}
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zassert_true(i >= 0,
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"No available IRQ line to use in the test\n");
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TC_PRINT("Available IRQ line: %u\n", i);
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arch_irq_connect_dynamic(i, 0 /* highest priority */,
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arm_isr_handler,
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NULL,
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0);
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NVIC_ClearPendingIRQ(i);
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NVIC_EnableIRQ(i);
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/* Allow the user thread to trigger an interrupt;
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* this is *ONLY* done for testing purposes, here,
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* i.e. to allow the inspection of the thread state
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* while running in user mode.
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*/
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SCB->CCR |= SCB_CCR_USERSETMPEND_Msk;
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#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE*/
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/* Create and switch to a user thread, passing
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* as argument the IRQ line to used in the test.
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*/
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k_thread_create(&user_thread,
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user_thread_stack,
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K_THREAD_STACK_SIZEOF(user_thread_stack),
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(k_thread_entry_t)user_thread_entry,
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(u32_t *)i, NULL, NULL,
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K_PRIO_COOP(PRIORITY), K_USER,
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K_NO_WAIT);
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}
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#endif /* CONFIG_USERSPACE */
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/**
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* @}
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*/
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@ -7,10 +7,16 @@
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#include <ztest.h>
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extern void test_arm_thread_swap(void);
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extern void test_arm_syscalls(void);
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void test_main(void)
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{
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ztest_test_suite(arm_thread_swap,
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ztest_unit_test(test_arm_thread_swap));
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ztest_run_test_suite(arm_thread_swap);
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#if defined(CONFIG_USERSPACE)
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ztest_test_suite(arm_syscalls,
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ztest_unit_test(test_arm_syscalls));
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ztest_run_test_suite(arm_syscalls);
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#endif
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}
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15
tests/arch/arm/arm_thread_swap/src/test_syscalls.h
Normal file
15
tests/arch/arm/arm_thread_swap/src/test_syscalls.h
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@ -0,0 +1,15 @@
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/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _TEST_SYSCALLS_H_
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#define _TEST_SYSCALLS_H_
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#include <zephyr.h>
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__syscall void test_arm_user_syscall(void);
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#include <syscalls/test_syscalls.h>
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#endif /* _TEST_SYSCALLS_H_ */
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