arch/x86: Use NMI stack for NMIs
NMI can be triggered at any time, even when in the process of switching stacks. Use special stack for it. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
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@ -28,6 +28,11 @@ extern uint8_t _exception_stack1[];
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extern uint8_t _exception_stack2[];
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extern uint8_t _exception_stack3[];
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extern uint8_t _nmi_stack[];
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extern uint8_t _nmi_stack1[];
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extern uint8_t _nmi_stack2[];
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extern uint8_t _nmi_stack3[];
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#ifdef CONFIG_X86_KPTI
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extern uint8_t z_x86_trampoline_stack[];
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extern uint8_t z_x86_trampoline_stack1[];
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@ -40,6 +45,7 @@ struct x86_tss64 tss0 = {
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#ifdef CONFIG_X86_KPTI
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.ist2 = (uint64_t) z_x86_trampoline_stack + Z_X86_TRAMPOLINE_STACK_SIZE,
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#endif
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.ist6 = (uint64_t) _nmi_stack + CONFIG_X86_EXCEPTION_STACK_SIZE,
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.ist7 = (uint64_t) _exception_stack + CONFIG_X86_EXCEPTION_STACK_SIZE,
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.iomapb = 0xFFFF,
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.cpu = &(_kernel.cpus[0])
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@ -51,6 +57,7 @@ struct x86_tss64 tss1 = {
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#ifdef CONFIG_X86_KPTI
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.ist2 = (uint64_t) z_x86_trampoline_stack1 + Z_X86_TRAMPOLINE_STACK_SIZE,
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#endif
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.ist6 = (uint64_t) _nmi_stack1 + CONFIG_X86_EXCEPTION_STACK_SIZE,
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.ist7 = (uint64_t) _exception_stack1 + CONFIG_X86_EXCEPTION_STACK_SIZE,
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.iomapb = 0xFFFF,
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.cpu = &(_kernel.cpus[1])
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@ -63,6 +70,7 @@ struct x86_tss64 tss2 = {
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#ifdef CONFIG_X86_KPTI
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.ist2 = (uint64_t) z_x86_trampoline_stack2 + Z_X86_TRAMPOLINE_STACK_SIZE,
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#endif
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.ist6 = (uint64_t) _nmi_stack2 + CONFIG_X86_EXCEPTION_STACK_SIZE,
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.ist7 = (uint64_t) _exception_stack2 + CONFIG_X86_EXCEPTION_STACK_SIZE,
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.iomapb = 0xFFFF,
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.cpu = &(_kernel.cpus[2])
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@ -75,6 +83,7 @@ struct x86_tss64 tss3 = {
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#ifdef CONFIG_X86_KPTI
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.ist2 = (uint64_t) z_x86_trampoline_stack3 + Z_X86_TRAMPOLINE_STACK_SIZE,
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#endif
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.ist6 = (uint64_t) _nmi_stack3 + CONFIG_X86_EXCEPTION_STACK_SIZE,
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.ist7 = (uint64_t) _exception_stack3 + CONFIG_X86_EXCEPTION_STACK_SIZE,
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.iomapb = 0xFFFF,
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.cpu = &(_kernel.cpus[3])
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@ -821,16 +821,18 @@ IRQ(248); IRQ(249); IRQ(250); IRQ(251); IRQ(252); IRQ(253); IRQ(254); IRQ(255)
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#define IRQ_STACK 2
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#define EXC_STACK 2
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#define BAD_STACK 2
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#define NMI_STACK 2
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#else
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#define IRQ_STACK 1
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#define NMI_STACK 6 /* NMI stack */
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#define EXC_STACK 7
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#define BAD_STACK 7 /* Horrible things: NMIs, double faults, MCEs */
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#define BAD_STACK 7 /* Horrible things: double faults, MCEs */
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#endif
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.align 16
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idt:
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IDT( 0, TRAP, EXC_STACK); IDT( 1, TRAP, EXC_STACK)
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IDT( 2, TRAP, BAD_STACK); IDT( 3, TRAP, EXC_STACK)
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IDT( 2, TRAP, NMI_STACK); IDT( 3, TRAP, EXC_STACK)
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IDT( 4, TRAP, EXC_STACK); IDT( 5, TRAP, EXC_STACK)
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IDT( 6, TRAP, EXC_STACK); IDT( 7, TRAP, EXC_STACK)
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IDT( 8, TRAP, BAD_STACK); IDT( 9, TRAP, EXC_STACK)
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@ -1041,12 +1043,20 @@ gdt80: /* LGDT descriptor for long mode */
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.align 16
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_exception_stack:
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.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
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.global _nmi_stack
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.align 16
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_nmi_stack:
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.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
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#if CONFIG_MP_NUM_CPUS > 1
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.global _exception_stack1
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.align 16
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_exception_stack1:
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.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
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.global _nmi_stack1
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.align 16
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_nmi_stack1:
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.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
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#endif
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#if CONFIG_MP_NUM_CPUS > 2
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@ -1054,6 +1064,10 @@ _exception_stack1:
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.align 16
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_exception_stack2:
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.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
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.global _nmi_stack2
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.align 16
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_nmi_stack2:
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.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
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#endif
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#if CONFIG_MP_NUM_CPUS > 3
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@ -1061,6 +1075,10 @@ _exception_stack2:
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.align 16
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_exception_stack3:
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.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
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.global _nmi_stack3
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.align 16
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_nmi_stack3:
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.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
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#endif
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#ifdef CONFIG_X86_KPTI
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@ -37,6 +37,7 @@ GEN_OFFSET_SYM(_thread_arch_t, ptables);
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GEN_OFFSET_SYM(x86_tss64_t, ist1);
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GEN_OFFSET_SYM(x86_tss64_t, ist2);
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GEN_OFFSET_SYM(x86_tss64_t, ist6);
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GEN_OFFSET_SYM(x86_tss64_t, ist7);
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GEN_OFFSET_SYM(x86_tss64_t, cpu);
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#ifdef CONFIG_USERSPACE
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