drivers: spi : driver with DMA for the stm32u5
This commit is the adaptation of the stm32 SPI driver with DMA transfer for the stm32u5 soc. Use the DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi) also valid for the stm32U5 serie. Signed-off-by: Francois Ramu <francois.ramu@st.com>
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99ab3fba54
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86ede2b679
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@ -730,7 +730,7 @@ static int transceive_dma(const struct device *dev,
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/* Set buffers info */
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spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 1);
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
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/* set request before enabling (else SPI CFG1 reg is write protected) */
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LL_SPI_EnableDMAReq_RX(spi);
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LL_SPI_EnableDMAReq_TX(spi);
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@ -741,7 +741,7 @@ static int transceive_dma(const struct device *dev,
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}
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#else
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LL_SPI_Enable(spi);
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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#endif /* st_stm32h7_spi */
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/* This is turned off in spi_stm32_complete(). */
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spi_stm32_cs_control(dev, true);
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@ -764,11 +764,12 @@ static int transceive_dma(const struct device *dev,
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break;
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}
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#if !defined(CONFIG_SOC_SERIES_STM32H7X)
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#if !DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
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/* toggle the DMA request to restart the transfer */
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LL_SPI_EnableDMAReq_RX(spi);
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LL_SPI_EnableDMAReq_TX(spi);
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#endif /* ! CONFIG_SOC_SERIES_STM32H7X */
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#endif /* ! st_stm32h7_spi */
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ret = wait_dma_rx_tx_done(dev);
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if (ret != 0) {
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@ -784,11 +785,11 @@ static int transceive_dma(const struct device *dev,
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while (ll_func_spi_dma_busy(spi) == 0) {
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}
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#if !defined(CONFIG_SOC_SERIES_STM32H7X)
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#if !DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
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/* toggle the DMA transfer request */
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LL_SPI_DisableDMAReq_TX(spi);
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LL_SPI_DisableDMAReq_RX(spi);
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#endif /* ! CONFIG_SOC_SERIES_STM32H7X */
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#endif /* ! st_stm32h7_spi */
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spi_context_update_tx(&data->ctx, 1, dma_len);
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spi_context_update_rx(&data->ctx, 1, dma_len);
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@ -914,6 +915,9 @@ static int spi_stm32_init(const struct device *dev)
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LOG_ERR("%s device not ready", data->dma_tx.dma_dev->name);
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return -ENODEV;
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}
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LOG_INF(" SPI with DMA transfer");
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#endif /* CONFIG_SPI_STM32_DMA */
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err = spi_context_cs_configure_all(&data->ctx);
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@ -62,13 +62,13 @@ struct spi_stm32_data {
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volatile uint32_t status_flags;
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struct stream dma_rx;
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struct stream dma_tx;
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#endif
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#endif /* CONFIG_SPI_STM32_DMA */
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};
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#ifdef CONFIG_SPI_STM32_DMA
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static inline uint32_t ll_func_dma_get_reg_addr(SPI_TypeDef *spi, uint32_t location)
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{
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
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if (location == SPI_STM32_DMA_TX) {
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/* use direct register location until the LL_SPI_DMA_GetTxRegAddr exists */
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return (uint32_t)&(spi->TXDR);
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@ -78,7 +78,7 @@ static inline uint32_t ll_func_dma_get_reg_addr(SPI_TypeDef *spi, uint32_t locat
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#else
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ARG_UNUSED(location);
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return (uint32_t)LL_SPI_DMA_GetRegAddr(spi);
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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#endif /* st_stm32h7_spi */
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}
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/* checks that DMA Tx packet is fully transmitted over the SPI */
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@ -90,7 +90,7 @@ static inline uint32_t ll_func_spi_dma_busy(SPI_TypeDef *spi)
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/* the SPI Tx empty and busy flags are needed */
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return (LL_SPI_IsActiveFlag_TXE(spi) &&
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!LL_SPI_IsActiveFlag_BSY(spi));
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#endif
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#endif /* LL_SPI_SR_TXC */
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}
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#endif /* CONFIG_SPI_STM32_DMA */
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@ -100,7 +100,7 @@ static inline uint32_t ll_func_tx_is_empty(SPI_TypeDef *spi)
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return LL_SPI_IsActiveFlag_TXP(spi);
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#else
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return LL_SPI_IsActiveFlag_TXE(spi);
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#endif
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#endif /* st_stm32h7_spi */
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}
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static inline uint32_t ll_func_rx_is_not_empty(SPI_TypeDef *spi)
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@ -109,7 +109,7 @@ static inline uint32_t ll_func_rx_is_not_empty(SPI_TypeDef *spi)
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return LL_SPI_IsActiveFlag_RXP(spi);
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#else
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return LL_SPI_IsActiveFlag_RXNE(spi);
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#endif
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#endif /* st_stm32h7_spi */
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}
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static inline void ll_func_enable_int_tx_empty(SPI_TypeDef *spi)
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@ -118,7 +118,7 @@ static inline void ll_func_enable_int_tx_empty(SPI_TypeDef *spi)
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LL_SPI_EnableIT_TXP(spi);
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#else
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LL_SPI_EnableIT_TXE(spi);
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#endif
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#endif /* st_stm32h7_spi */
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}
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static inline void ll_func_enable_int_rx_not_empty(SPI_TypeDef *spi)
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@ -127,7 +127,7 @@ static inline void ll_func_enable_int_rx_not_empty(SPI_TypeDef *spi)
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LL_SPI_EnableIT_RXP(spi);
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#else
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LL_SPI_EnableIT_RXNE(spi);
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#endif
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#endif /* st_stm32h7_spi */
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}
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static inline void ll_func_enable_int_errors(SPI_TypeDef *spi)
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@ -140,7 +140,7 @@ static inline void ll_func_enable_int_errors(SPI_TypeDef *spi)
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LL_SPI_EnableIT_MODF(spi);
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#else
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LL_SPI_EnableIT_ERR(spi);
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#endif
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#endif /* st_stm32h7_spi */
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}
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static inline void ll_func_disable_int_tx_empty(SPI_TypeDef *spi)
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@ -149,7 +149,7 @@ static inline void ll_func_disable_int_tx_empty(SPI_TypeDef *spi)
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LL_SPI_DisableIT_TXP(spi);
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#else
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LL_SPI_DisableIT_TXE(spi);
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#endif
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#endif /* st_stm32h7_spi */
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}
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static inline void ll_func_disable_int_rx_not_empty(SPI_TypeDef *spi)
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@ -158,7 +158,7 @@ static inline void ll_func_disable_int_rx_not_empty(SPI_TypeDef *spi)
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LL_SPI_DisableIT_RXP(spi);
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#else
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LL_SPI_DisableIT_RXNE(spi);
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#endif
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#endif /* st_stm32h7_spi */
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}
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static inline void ll_func_disable_int_errors(SPI_TypeDef *spi)
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@ -171,7 +171,7 @@ static inline void ll_func_disable_int_errors(SPI_TypeDef *spi)
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LL_SPI_DisableIT_MODF(spi);
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#else
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LL_SPI_DisableIT_ERR(spi);
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#endif
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#endif /* st_stm32h7_spi */
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}
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static inline uint32_t ll_func_spi_is_busy(SPI_TypeDef *spi)
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@ -180,7 +180,7 @@ static inline uint32_t ll_func_spi_is_busy(SPI_TypeDef *spi)
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return LL_SPI_IsActiveFlag_EOT(spi);
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#else
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return LL_SPI_IsActiveFlag_BSY(spi);
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#endif
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#endif /* st_stm32h7_spi */
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}
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/* Header is compiled first, this switch avoid the compiler to lookup for
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@ -193,7 +193,7 @@ static inline void ll_func_set_fifo_threshold_8bit(SPI_TypeDef *spi)
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LL_SPI_SetFIFOThreshold(spi, LL_SPI_FIFO_TH_01DATA);
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#else
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LL_SPI_SetRxFIFOThreshold(spi, LL_SPI_RX_FIFO_TH_QUARTER);
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#endif
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#endif /* st_stm32h7_spi */
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}
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static inline void ll_func_set_fifo_threshold_16bit(SPI_TypeDef *spi)
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@ -202,9 +202,9 @@ static inline void ll_func_set_fifo_threshold_16bit(SPI_TypeDef *spi)
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LL_SPI_SetFIFOThreshold(spi, LL_SPI_FIFO_TH_02DATA);
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#else
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LL_SPI_SetRxFIFOThreshold(spi, LL_SPI_RX_FIFO_TH_HALF);
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#endif
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#endif /* st_stm32h7_spi */
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}
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#endif
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#endif /* st_stm32_spi_fifo */
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static inline void ll_func_disable_spi(SPI_TypeDef *spi)
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{
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@ -228,7 +228,7 @@ static inline void ll_func_disable_spi(SPI_TypeDef *spi)
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LL_SPI_ClearFlag_SUSP(spi);
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#else
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LL_SPI_Disable(spi);
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#endif
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#endif /* st_stm32h7_spi */
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}
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#endif /* ZEPHYR_DRIVERS_SPI_SPI_LL_STM32_H_ */
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