drivers: pwm_nrf5_sw: Rename to pwm_nrf_sw

Since the driver can now be also used on nRF91 Series, its name need to
be updated to not cause confusion.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2023-08-08 12:41:03 +02:00 committed by Carles Cufí
parent 8c1c666bab
commit 88ab153ac4
8 changed files with 43 additions and 42 deletions

View file

@ -8,7 +8,7 @@ zephyr_library_sources_ifdef(CONFIG_PWM_TELINK_B91 pwm_b91.c)
zephyr_library_sources_ifdef(CONFIG_PWM_CC13XX_CC26XX_TIMER pwm_cc13xx_cc26xx_timer.c) zephyr_library_sources_ifdef(CONFIG_PWM_CC13XX_CC26XX_TIMER pwm_cc13xx_cc26xx_timer.c)
zephyr_library_sources_ifdef(CONFIG_PWM_STM32 pwm_stm32.c) zephyr_library_sources_ifdef(CONFIG_PWM_STM32 pwm_stm32.c)
zephyr_library_sources_ifdef(CONFIG_PWM_SIFIVE pwm_sifive.c) zephyr_library_sources_ifdef(CONFIG_PWM_SIFIVE pwm_sifive.c)
zephyr_library_sources_ifdef(CONFIG_PWM_NRF5_SW pwm_nrf5_sw.c) zephyr_library_sources_ifdef(CONFIG_PWM_NRF_SW pwm_nrf_sw.c)
zephyr_library_sources_ifdef(CONFIG_PWM_NRFX pwm_nrfx.c) zephyr_library_sources_ifdef(CONFIG_PWM_NRFX pwm_nrfx.c)
zephyr_library_sources_ifdef(CONFIG_PWM_MCUX_FTM pwm_mcux_ftm.c) zephyr_library_sources_ifdef(CONFIG_PWM_MCUX_FTM pwm_mcux_ftm.c)
zephyr_library_sources_ifdef(CONFIG_PWM_IMX pwm_imx.c) zephyr_library_sources_ifdef(CONFIG_PWM_IMX pwm_imx.c)

View file

@ -41,7 +41,7 @@ source "drivers/pwm/Kconfig.stm32"
source "drivers/pwm/Kconfig.sifive" source "drivers/pwm/Kconfig.sifive"
source "drivers/pwm/Kconfig.nrf5_sw" source "drivers/pwm/Kconfig.nrf_sw"
source "drivers/pwm/Kconfig.nrfx" source "drivers/pwm/Kconfig.nrfx"

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@ -1,20 +0,0 @@
# Nordic Semiconductor nRF5x s/w PWM configuration options
# Copyright (c) 2017 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config PWM_NRF5_SW
bool "Nordic Semiconductor nRF5x series S/W PWM"
default y if !PWM_NRFX
depends on DT_HAS_NORDIC_NRF_SW_PWM_ENABLED
select NRFX_GPIOTE
select NRFX_PPI if HAS_HW_NRF_PPI
select NRFX_DPPI if HAS_HW_NRF_DPPIC
help
Enable driver to utilize PWM on the Nordic Semiconductor nRF5x series.
When used with HF timer it provides up to 3 pins, utilizing two PPI
channels per pin and one GPIOTE config per pin.
When used with RTC it provides up to 3 pins, utilizing three PPI
channels per pin and one GPIOTE config per pin.

View file

@ -0,0 +1,21 @@
# Nordic Semiconductor nRF5x s/w PWM configuration options
# Copyright (c) 2017 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config PWM_NRF_SW
bool "Nordic Semiconductor nRF family S/W PWM"
default y if !PWM_NRFX
depends on DT_HAS_NORDIC_NRF_SW_PWM_ENABLED
select NRFX_GPIOTE
select NRFX_PPI if HAS_HW_NRF_PPI
select NRFX_DPPI if HAS_HW_NRF_DPPIC
help
Enable driver to utilize PWM on the Nordic Semiconductor nRF SoCs.
When used with HF timer, it provides up to 5 pins, utilizing one
GPIOTE channel and two PPI/DPPI channels and per pin.
When used with RTC, it provides up to 3 pins, utilizing one GPIOTE
channel and two or three (when the fork feature is not available)
PPI/DPPI channels per pin.

View file

@ -17,7 +17,7 @@
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(pwm_nrf5_sw, CONFIG_PWM_LOG_LEVEL); LOG_MODULE_REGISTER(pwm_nrf_sw, CONFIG_PWM_LOG_LEVEL);
#define GENERATOR_NODE DT_INST_PHANDLE(0, generator) #define GENERATOR_NODE DT_INST_PHANDLE(0, generator)
#define GENERATOR_CC_NUM DT_PROP(GENERATOR_NODE, cc_num) #define GENERATOR_CC_NUM DT_PROP(GENERATOR_NODE, cc_num)
@ -116,9 +116,9 @@ static uint32_t pwm_period_check(struct pwm_data *data, uint8_t map_size,
return 0; return 0;
} }
static int pwm_nrf5_sw_set_cycles(const struct device *dev, uint32_t channel, static int pwm_nrf_sw_set_cycles(const struct device *dev, uint32_t channel,
uint32_t period_cycles, uint32_t pulse_cycles, uint32_t period_cycles, uint32_t pulse_cycles,
pwm_flags_t flags) pwm_flags_t flags)
{ {
const struct pwm_config *config = dev->config; const struct pwm_config *config = dev->config;
NRF_TIMER_Type *timer = pwm_config_timer(config); NRF_TIMER_Type *timer = pwm_config_timer(config);
@ -273,7 +273,7 @@ static int pwm_nrf5_sw_set_cycles(const struct device *dev, uint32_t channel,
#if PPI_FORK_AVAILABLE #if PPI_FORK_AVAILABLE
nrfx_gppi_fork_endpoint_setup(ppi_chs[1], nrfx_gppi_fork_endpoint_setup(ppi_chs[1],
clear_task_addr); clear_task_address);
#else #else
nrfx_gppi_channel_endpoints_setup(ppi_chs[2], nrfx_gppi_channel_endpoints_setup(ppi_chs[2],
period_end_event_address, period_end_event_address,
@ -310,8 +310,8 @@ static int pwm_nrf5_sw_set_cycles(const struct device *dev, uint32_t channel,
return 0; return 0;
} }
static int pwm_nrf5_sw_get_cycles_per_sec(const struct device *dev, static int pwm_nrf_sw_get_cycles_per_sec(const struct device *dev,
uint32_t channel, uint64_t *cycles) uint32_t channel, uint64_t *cycles)
{ {
const struct pwm_config *config = dev->config; const struct pwm_config *config = dev->config;
@ -332,12 +332,12 @@ static int pwm_nrf5_sw_get_cycles_per_sec(const struct device *dev,
return 0; return 0;
} }
static const struct pwm_driver_api pwm_nrf5_sw_drv_api_funcs = { static const struct pwm_driver_api pwm_nrf_sw_drv_api_funcs = {
.set_cycles = pwm_nrf5_sw_set_cycles, .set_cycles = pwm_nrf_sw_set_cycles,
.get_cycles_per_sec = pwm_nrf5_sw_get_cycles_per_sec, .get_cycles_per_sec = pwm_nrf_sw_get_cycles_per_sec,
}; };
static int pwm_nrf5_sw_init(const struct device *dev) static int pwm_nrf_sw_init(const struct device *dev)
{ {
const struct pwm_config *config = dev->config; const struct pwm_config *config = dev->config;
struct pwm_data *data = dev->data; struct pwm_data *data = dev->data;
@ -402,7 +402,7 @@ static int pwm_nrf5_sw_init(const struct device *dev)
((DT_GPIO_FLAGS_BY_IDX(_node_id, _prop, _idx) & GPIO_ACTIVE_LOW) \ ((DT_GPIO_FLAGS_BY_IDX(_node_id, _prop, _idx) & GPIO_ACTIVE_LOW) \
? BIT(_idx) : 0) | ? BIT(_idx) : 0) |
static const struct pwm_config pwm_nrf5_sw_0_config = { static const struct pwm_config pwm_nrf_sw_0_config = {
COND_CODE_1(USE_RTC, (.rtc), (.timer)) = GENERATOR_ADDR, COND_CODE_1(USE_RTC, (.rtc), (.timer)) = GENERATOR_ADDR,
.psel_ch = { .psel_ch = {
DT_INST_FOREACH_PROP_ELEM(0, channel_gpios, PSEL_AND_COMMA) DT_INST_FOREACH_PROP_ELEM(0, channel_gpios, PSEL_AND_COMMA)
@ -413,13 +413,13 @@ static const struct pwm_config pwm_nrf5_sw_0_config = {
.prescaler = DT_INST_PROP(0, clock_prescaler), .prescaler = DT_INST_PROP(0, clock_prescaler),
}; };
static struct pwm_data pwm_nrf5_sw_0_data; static struct pwm_data pwm_nrf_sw_0_data;
DEVICE_DT_INST_DEFINE(0, DEVICE_DT_INST_DEFINE(0,
pwm_nrf5_sw_init, pwm_nrf_sw_init,
NULL, NULL,
&pwm_nrf5_sw_0_data, &pwm_nrf_sw_0_data,
&pwm_nrf5_sw_0_config, &pwm_nrf_sw_0_config,
POST_KERNEL, POST_KERNEL,
CONFIG_PWM_INIT_PRIORITY, CONFIG_PWM_INIT_PRIORITY,
&pwm_nrf5_sw_drv_api_funcs); &pwm_nrf_sw_drv_api_funcs);

View file

@ -5,7 +5,7 @@ CONFIG_GPIO=y
CONFIG_DISPLAY=y CONFIG_DISPLAY=y
CONFIG_MICROBIT_DISPLAY=y CONFIG_MICROBIT_DISPLAY=y
CONFIG_PWM=y CONFIG_PWM=y
CONFIG_PWM_NRF5_SW=y CONFIG_PWM_NRF_SW=y
CONFIG_BT_RX_STACK_SIZE=1280 CONFIG_BT_RX_STACK_SIZE=1280
CONFIG_BT_CTLR_DUP_FILTER_LEN=0 CONFIG_BT_CTLR_DUP_FILTER_LEN=0

View file

@ -8,7 +8,7 @@ CONFIG_GPIO=y
CONFIG_DISPLAY=y CONFIG_DISPLAY=y
CONFIG_MICROBIT_DISPLAY=y CONFIG_MICROBIT_DISPLAY=y
CONFIG_PWM=y CONFIG_PWM=y
CONFIG_PWM_NRF5_SW=y CONFIG_PWM_NRF_SW=y
# This feature isn't needed as this sample is intended to be used # This feature isn't needed as this sample is intended to be used
# between zephyr devices only. # between zephyr devices only.

View file

@ -2,4 +2,4 @@ CONFIG_GPIO=y
CONFIG_DISPLAY=y CONFIG_DISPLAY=y
CONFIG_MICROBIT_DISPLAY=y CONFIG_MICROBIT_DISPLAY=y
CONFIG_PWM=y CONFIG_PWM=y
CONFIG_PWM_NRF5_SW=y CONFIG_PWM_NRF_SW=y